Patents by Inventor Wing Keung Lam

Wing Keung Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10311597
    Abstract: The invention provides an apparatus for determining a bonding position of a die. The apparatus includes a bond head for picking up and bonding the die. The apparatus further includes a plurality of cameras positioned and configured for capturing at least a first image including a first side surface of the die, a second image including a second side surface of the die and a third image including the first and second side surfaces of the die. Further, the invention provides a method of determining a bonding position of a die. The method captures at least a first image including a first side surface of the die, a second image including a second side surface of the die and a third image including the first and second side surfaces of the die. The method further determines a bonding position of the die based on the captured images.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: June 4, 2019
    Assignee: ASM TECHNOLOGY SINGAPORE PTE LTD
    Inventors: Kui Kam Lam, Shun Ming Fung, Chi Keung Leung, Wing Kin Lam, Yuet Cheung
  • Patent number: 9449903
    Abstract: An integrated circuit package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween and a semiconductor die mounted on the first surface of the substrate. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulant encapsulates the wirebonds and the semiconductor die. A heat spreader has a cap, at least a portion of the cap extending inwardly toward and being spaced from the semiconductor die. The encapsulant fills the space between the portion of the cap and the semiconductor die. The heat spreader further has at least one sidewall extending from the cap, the at least one sidewall disposed on the substrate. A ball grid array is disposed on the second surface of the substrate, bumps of the ball grid array being in electrical connection with ones of the conductive traces.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: September 20, 2016
    Assignee: UTAC Hong Kong Limited
    Inventors: Neil McLellan, Ming Wang Sze, Kwok Cheung Tsang, Wing Keung Lam, Wai Kit Tam
  • Publication number: 20140183712
    Abstract: An integrated circuit package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween and a semiconductor die mounted on the first surface of the substrate. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulant encapsulates the wirebonds and the semiconductor die. A heat spreader has a cap, at least a portion of the cap extending inwardly toward and being spaced from the semiconductor die. The encapsulant fills the space between the portion of the cap and the semiconductor die. The heat spreader further has at least one sidewall extending from the cap, the at least one sidewall disposed on the substrate. A ball grid array is disposed on the second surface of the substrate, bumps of the ball grid array being in electrical connection with ones of the conductive traces.
    Type: Application
    Filed: December 17, 2013
    Publication date: July 3, 2014
    Applicant: UTAC Hong Kong Limited
    Inventors: Neil McLellan, Ming Wang Sze, Kwok Cheung Tsang, Wing Keung Lam, Wai Kit Tam
  • Patent number: 8610262
    Abstract: An integrated circuit package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween and a semiconductor die mounted on the first surface of the substrate. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate and an encapsulant encapsulates the wirebonds and the semiconductor die. A heat spreader has a cap, at least a portion of the cap extending inwardly toward and being spaced from the semiconductor die. The encapsulant fills the space between the portion of the cap and the semiconductor die. The heat spreader further has at least one sidewall extending from the cap, the at least one sidewall disposed on the substrate. A ball grid array is disposed on the second surface of the substrate, bumps of the ball grid array being in electrical connection with ones of the conductive traces.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: December 17, 2013
    Assignee: UTAC Hong Kong Limited
    Inventors: Neil McLellan, Ming Wang Sze, Kwok Cheung Tsang, Wing Keung Lam, Wai Kit Tam
  • Patent number: 7315080
    Abstract: A ball grid array package is manufactured by mounting a semiconductor die to a first surface of a substrate and mounting a die adapter to the semiconductor die. The semiconductor die is wire bonded to ones of conductive traces of the substrate. A collapsible spacer is mounted to the substrate and the substrate is releasably clamped to an upper side of a mold cavity. A heat spreader and at least one collapsible spacer are placed in the mold cavity such that the collapsible spacer is disposed between the heat spreader and the substrate. A molding compound is molded in the mold, thereby molding the semiconductor die, the substrate, the wire bonds, the die adapter, the at least one collapsible spacer and the heat spreader into the molding compound to provide a molded package. A ball grid array is formed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces and the integrated circuit package is singulated.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: January 1, 2008
    Assignee: ASAT Ltd.
    Inventors: Chun Ho Fan, Wing Keung Lam, Ming Wang Sze, Sadak Thamby Labeeb, Neil McLellan, Mohan Kirloskar
  • Patent number: 6987032
    Abstract: A ball grid array package is manufactured by mounting a semiconductor die to a first surface of a substrate and mounting a die adapter to the semiconductor die. The semiconductor die is wire bonded to ones of conductive traces of the substrate. A collapsible spacer is mounted to the substrate and the substrate is releasably clamped to an upper side of a mold cavity. A heat spreader and at least one collapsible spacer are placed in the mold cavity such that the collapsible spacer is disposed between the heat spreader and the substrate. A molding compound is molded in the mold, thereby molding the semiconductor die, the substrate, the wire bonds, the die adapter, the at least one collapsible spacer and the heat spreader into the molding compound to provide a molded package. A ball grid array is formed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces and the integrated circuit package is singulated.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: January 17, 2006
    Assignee: ASAT Ltd.
    Inventors: Chun Ho Fan, Wing Keung Lam, Ming Wang Sze, Sadak Thamby Labeeb, Neil McLellan, Mohan Kirloskar
  • Patent number: 6737755
    Abstract: An integrated circuit package is provided. The package includes a substrate having first and second surfaces and a plurality of conductive traces therebetween. A semiconductor die is mounted on the first surface of the substrate and an adapter disposed on the semiconductor die. A plurality of wire bonds connect the semiconductor die to ones of the conductive traces of the substrate, and an encapsulant encapsulates the wirebonds and a remainder of the semiconductor die. A heat spreader has a top portion in contact with the adapter and at least one sidewall extends from the top portion. At least a portion of the at least one sidewall is in contact with the substrate. A ball grid array is disposed on the second surface of the substrate, bumps of the ball grid array being in electrical connection with ones of the conductive traces.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: May 18, 2004
    Assignee: Asat, Ltd.
    Inventors: Neil McLellan, Ming Wang Sze, Wing Keung Lam, Kin-wai Wong
  • Patent number: 6586834
    Abstract: An integrated circuit package including a flexible circuit tape having a flexible polyimide tape laminated to a conductor layer, a plurality of blind holes extending through the flexible tape to the conductor layer and a plurality of through holes extending through the flexible tape and the conductor layer. A copper leadframe is fixed to the flexible circuit tape and electrically isolated from the conductor layer. The copper leadframe includes an etched down die attach pad and heat spreader portions. The die attach pad is etched down such that at least a portion of the die attach pad is reduced in thickness. The through holes in the flexible circuit tape extend through to the copper leadframe. A semiconductor die is mounted on the at least a portion of the die attach pad. Wire bonds extend from pads on the semiconductor die to the die attach pad and from other pads on the semiconductor die to the conductor layer, an encapsulating material encapsulates the semiconductor die and the wire bonds.
    Type: Grant
    Filed: June 17, 2002
    Date of Patent: July 1, 2003
    Assignee: Asat Ltd.
    Inventors: Ming Wang Sze, Kwok Cheung Tsang, Wing Keung Lam, Kin-wai Wong