Abstract: Circuits and methods for generating a bypass pulse to an RF circuit that increases the response time of the circuit to mode changes. Embodiments include a pulse generation circuit that it is self-initiated and self-terminated, generating a bypass pulse as a function of voltages V1 and V2 along a signal path. Voltage V3, a scaled version of V1, is compared to a voltage V4 derived from V2 and a pulse is output while V3>V4. The pulse temporarily lowers the signal path impedance, reducing the RC time constant of the signal path and allowing fast charging of components coupled to the signal path. The pulse may be used with any other circuit that needs a faster settling time after a mode change but is slowed down by an RC time constant. Usage also extends to providing for rapid discharge of the signal path by adding additional logic components.

Abstract: Circuits and methods for generating a bypass pulse to an RF circuit that increases the response time of the circuit to mode changes. Embodiments include a pulse generation circuit that it is self-initiated and self-terminated, generating a bypass pulse as a function of voltages V1 and V2 along a signal path. Voltage V3, a scaled version of V1, is compared to a voltage V4 derived from V2 and a pulse is output while V3>V4. The pulse temporarily lowers the signal path impedance, reducing the RC time constant of the signal path and allowing fast charging of components coupled to the signal path. The pulse may be used with any other circuit that needs a faster settling time after a mode change but is slowed down by an RC time constant. Usage also extends to providing for rapid discharge of the signal path by adding additional logic components.

Abstract: Circuits and methods for generating a bypass pulse to an RF circuit that increases the response time of the circuit to mode changes. Embodiments include a pulse generation circuit that it is self-initiated and self-terminated, generating a bypass pulse as a function of voltages V1 and V2 along a signal path. Voltage V3, a scaled version of V1, is compared to a voltage V4 derived from V2 and a pulse is output while V3>V4. The pulse temporarily lowers the signal path impedance, reducing the RC time constant of the signal path and allowing fast charging of components coupled to the signal path. The pulse may be used with any other circuit that needs a faster settling time after a mode change but is slowed down by an RC time constant. Usage also extends to providing for rapid discharge of the signal path by adding additional logic components.

Abstract: Cure monitoring systems for and methods of monitoring polymerizable material to determine the degree of curing of the polymerizable material. A monitoring light source delivers visible monitoring light at one or more different visible wavelengths and a visible light detector detects the monitoring light diffusely reflected by the polymerizable material. The monitoring light has a wavelength of maximum emission (?max-mon) that does not effectively induce polymerization of the polymerizable material. Change in intensity of the monitoring light reflected from the polymerizable material is used to determine when a selected degree of curing is reached in the polymerizable material.

Abstract: Dental curing light systems capable of monitoring the degree of curing of polymerizable dental material. A monitoring light source delivers visible monitoring light at one or more different visible wavelengths and a visible light detector detects the monitoring light diffusely reflected by the polymerizable dental material. The monitoring light has a wavelength of maximum emission (?max-mon) that does not effectively induce polymerization of the polymerizable dental material. Change in intensity of the monitoring light reflected from the polymerizable dental material is used to determine when a selected degree of curing is reached in the polymerizable dental material.

Abstract: A communication circuit may include a first pair of digital-to-analog converters (DACs) coupled to an input of a first mixer and configured to generate first baseband signals. The communication circuit may further include a second pair of DACs coupled to an input of a second mixer and configured to generate second baseband signals. The second baseband signals may be shifted in phase relative to the first baseband signals.

Abstract: A communication circuit may include a first pair of digital-to-analog converters (DACs) coupled to an input of a first mixer and configured to generate first baseband signals. The communication circuit may further include a second pair of DACs coupled to an input of a second mixer and configured to generate second baseband signals. The second baseband signals may be shifted in phase relative to the first baseband signals.

Abstract: Cure monitoring systems for and methods of monitoring polymerizable material to determine the degree of curing of the polymerizable material. A monitoring light source delivers visible monitoring light at one or more different visible wavelengths and a visible light detector detects the monitoring light diffusely reflected by the polymerizable material. The monitoring light has a wavelength of maximum emission (?max-mon) that does not effectively induce polymerization of the polymerizable material. Change in intensity of the monitoring light reflected from the polymerizable material is used to determine when a selected degree of curing is reached in the polymerizable material.

Abstract: In an example, there is disclosed herein a digital-to-analog converter (DAC) including a correction circuit for a clock, including a differential clock. Error correction may take place within the DAC core, by means of replica cells that are substantially similar to conversion cells. Rather than contributing their output to the converted signal, the replica cells may be configured to provide a feedback signal to a clock receiver with information for correcting the clock signal. The feedback signal may be operable to correct errors, for example, in duty cycle and crosspoint, as measured at the DAC core.

Abstract: In an example, there is disclosed herein a digital-to-analog converter (DAC) including a correction circuit for a clock, including a differential clock. Error correction may take place within the DAC core, by means of replica cells that are substantially similar to conversion cells. Rather than contributing their output to the converted signal, the replica cells may be configured to provide a feedback signal to a clock receiver with information for correcting the clock signal. The feedback signal may be operable to correct errors, for example, in duty cycle and crosspoint, as measured at the DAC core.

Abstract: The present invention provides a hose. The hose comprises a through hole therethrough and defines at least one recess and at least one convex portion on an outer surface thereof. The at least one recess matches with the at least one convex portion in shape. The hose of the present invention is used to sheath a surface of an object so that the object can be orderly arranged through interconnection of the at least one recess and the at least one convex portion on the outer surface of the hose.

Abstract: A method of making zeolite microneedles includes providing a polymer microneedles template, depositing zeolite seeds on the polymer microneedles template, and growing the zeolite seeds into an array of zeolite microneedles.

Abstract: A method of modeling yield for semiconductor products includes determining expected faults for each of a plurality of library elements by running a critical area analysis on each of the library elements, and assessing, from the critical area analysis, an expected number of faults per unit area, and comparing the same to actual observed faults on previously manufactured semiconductor products. Thereafter, the expected number of faults for each library element is updated in response to observed yield. A database is established, which includes the die size and expected faults for each of the library elements. Integrated circuit product die size is estimated, and library elements to be used to create the integrated circuit die are selected. Fault and size data for each of the selected library elements are obtained, the adjusted estimated faults for each of the library elements are summed, and estimated yield is calculated.

Abstract: Disclosed is a method and structure for altering an integrated circuit design having silicon over insulator (SOI) transistors. The method/structure prevents damage from charging during processing to the gate of SOI transistors by tracing electrical nets in the integrated circuit design, identifying SOI transistors that may have a voltage differential between the source/drain and gate as potentially damaged SOI transistors (based on the tracing of the electrical nets), and connecting a shunt device across the source/drain and the gate of each of the potentially damaged SOI transistors. Alternatively, the method/structure provides for connecting compensating conductors through a series device.

Abstract: A method and structure alters an integrated circuit design having silicon over insulator (SOI) transistors. The method/structure prevents damage from charging during processing to the gate of SOI transistors by tracing electrical nets in the integrated circuit design, identifying SOI transistors that have a voltage differential between the source/drain and gate as potentially damaged SOI transistors (based on the tracing of the electrical nets), and connecting a shunt device across the source/drain and the gate of each of the potentially damaged SOI transistors. Alternatively, the method/structure provides for connecting compensating conductors through a series device.

Abstract: An artificial tree has a central trunk, a number of main branches suspended from an upper portion of the trunk in a downwardly and outwardly inclined orientation, and a preformed tree top section extending upwardly from the upper portion of the trunk. Each main branch includes a number of sub-branch clusters and a bundle of fiber optic conduits which terminate in the sub-branches. The bundles of fiber optic conduits are received in an opaque enclosure housing a high intensity light source, which enclosure is attached to the upper portion of the trunk. Electric lights are disclosed as an alternative means to illuminate the tree. The trunk includes upwardly open hook elements which receive pin elements within the interior of rigid support members of the main branches. Each sub-branch cluster is pivotally connected to an associated rigid support member to articulate between a collapsed position for storage and shipping, and an extended position for display.

Abstract: An artificial tree has a central trunk, a number of main branches suspended from an upper portion of the trunk in a downwardly and outwardly inclined orientation, and a preformed tree top section extending upwardly from the upper portion of the trunk. Each main branch includes a number of sub-branch clusters and a bundle of fiber optic conduits which terminate in the sub-branches. The bundles of fiber optic conduits are received in an opaque enclosure housing a high intensity light source, which enclosure is attached to the upper portion of the trunk. Electric lights are disclosed as an alternative means to illuminate the tree. The trunk includes upwardly open hook elements which receive pin elements within the interior of rigid support members of the main branches. Each sub-branch cluster is pivotally connected to an associated rigid support member to articulate between a collapsed position for storage and shipping, and an extended position for display.