Patents by Inventor Wing Shan Tam

Wing Shan Tam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11316576
    Abstract: A wireless communication system and a precoder device for use in such system. The precoder device includes a delay element arranged to introduce a delay to a plurality of sub-channels of a signal at a transmitter end of the communication system; wherein the delay in a plurality of sub-channels are associated with a process time of a receiver component at a receiver end of the communication system.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: April 26, 2022
    Assignee: City University of Hong Kong
    Inventors: Chi Wah Kok, Wing Shan Tam, Wai Ming Chan, Hing Cheung So
  • Publication number: 20210135731
    Abstract: A wireless communication system and a precoder device for use in such system. The precoder device includes a delay element arranged to introduce a delay to a plurality of sub-channels of a signal at a transmitter end of the communication system; wherein the delay in a plurality of sub-channels are associated with a process time of a receiver component at a receiver end of the communication system.
    Type: Application
    Filed: October 30, 2019
    Publication date: May 6, 2021
    Inventors: Chi Wah Kok, Wing Shan Tam, Wai Ming Chan, Hing Cheung So
  • Patent number: 8547168
    Abstract: Systems, methods, and devices that employ a dynamic gate boost component (DGBC) to generate a desired boosted gate voltage to facilitate controlling an enhanced charge pump are presented. An enhanced charge pump can comprise a desired number of charge transfer switches (CTSs) and a desired number of DGBCs, wherein a DGBC can apply a desired boosted gate voltage to the gate of an associated CTS to control switching of the CTS. An auxiliary gate boost component (AGBC) of one circuit path can apply a desired boosted gate voltage to a CTS of another circuit path to control switching of that CTS. The AGBC and DGBC can operate to facilitate maintaining the overdrive voltages of all of the CTSs in the enhanced charge pump so that the overdrive voltages are essentially unchanged under various loading current conditions. Multiple enhanced charge pumps can be cascaded to produce a higher output voltage.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: October 1, 2013
    Assignee: Jen-Ai Holdings, LLC
    Inventors: Chi Wah Kok, Oi Ying Wong, Wing Shan Tam
  • Publication number: 20130093503
    Abstract: Systems, methods, and devices that employ a dynamic gate boost component (DGBC) to generate a desired boosted gate voltage to facilitate controlling an enhanced charge pump are presented. An enhanced charge pump can comprise a desired number of charge transfer switches (CTSs) and a desired number of DGBCs, wherein a DGBC can apply a desired boosted gate voltage to the gate of an associated CTS to control switching of the CTS. An auxiliary gate boost component (AGBC) of one circuit path can apply a desired boosted gate voltage to a CTS of another circuit path to control switching of that CTS. The AGBC and DGBC can operate to facilitate maintaining the overdrive voltages of all of the CTSs in the enhanced charge pump so that the overdrive voltages are essentially unchanged under various loading current conditions. Multiple enhanced charge pumps can be cascaded to produce a higher output voltage.
    Type: Application
    Filed: October 14, 2011
    Publication date: April 18, 2013
    Applicant: CANAAN MICROELECTRONICS CORPORATION LIMITED
    Inventors: Chi Wah Kok, Oi Ying Wong, Wing Shan Tam
  • Patent number: 8362824
    Abstract: Described herein are switched capacitor charge pump designs for a 2n× voltage converter. The 2n× voltage converter is constructed by cascading n units of substantially identical unit cells, which are respectively composed of cross-coupled single cell doubler circuits. Dynamic inverters are used to completely activate and deactivate the power switches in the respective unit cells to increase area efficiency. The charge pump designs described herein are implemented with standard high-voltage CMOS processes without requiring MOSFET transistors with different threshold voltages, giving the charge pump a regular structure that simplifies design and layout and reduces production costs. In addition, techniques for constructing a charge pump according to the designs provided herein are described.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: January 29, 2013
    Assignee: Canaan Microelectronics Corporation Limited
    Inventors: Oi Ying Wong, Wing Shan Tam, Chi Wah Kok
  • Patent number: 8339184
    Abstract: Systems, methods, and devices that generate a desired boosted gate voltage to facilitate controlling a charge pump are presented. A multi-phase charge pump (e.g., two-phase CMOS charge pump) can comprise a desired number of switch cells (SCs), wherein each SC can include a gate boost switch control component, which employs two transistors (without the need for external circuitry), and generates a desired gate voltage, based at least in part on a desired clock signal, wherein the desired gate voltage is applied to a charge transfer switch, Mc, of the SC to facilitate transferring a voltage across the Mc to a node on the other side of the Mc, in each stage of the charge pump, wherein the SCs are associated with a desired number of flying capacitors to facilitate increasing the input voltage to a desired output voltage.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: December 25, 2012
    Assignee: Canaan Microelectronics Corporation Limited
    Inventors: Chi Wah Kok, Oi Ying Wong, Wing Shan Tam
  • Publication number: 20120105137
    Abstract: Systems, methods, and devices that generate a desired boosted gate voltage to facilitate controlling a charge pump are presented. A multi-phase charge pump (e.g., two-phase CMOS charge pump) can comprise a desired number of switch cells (SCs), wherein each SC can include a gate boost switch control component, which employs two transistors (without the need for external circuitry), and generates a desired gate voltage, based at least in part on a desired clock signal, wherein the desired gate voltage is applied to a charge transfer switch, Mc, of the SC to facilitate transferring a voltage across the Mc to a node on the other side of the Mc, in each stage of the charge pump, wherein the SCs are associated with a desired number of flying capacitors to facilitate increasing the input voltage to a desired output voltage.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 3, 2012
    Applicant: CANAAN MICROELECTRONICS CORPORATION LIMITED
    Inventors: Chi Wah Kok, Oi Ying Wong, Wing Shan Tam
  • Publication number: 20110285455
    Abstract: Described herein are switched capacitor charge pump designs for a 2n× voltage converter. The 2n× voltage converter is constructed by cascading n units of substantially identical unit cells, which are respectively composed of cross-coupled single cell doubler circuits. Dynamic inverters are used to completely activate and deactivate the power switches in the respective unit cells to increase area efficiency. The charge pump designs described herein are implemented with standard high-voltage CMOS processes without requiring MOSFET transistors with different threshold voltages, giving the charge pump a regular structure that simplifies design and layout and reduces production costs. In addition, techniques for constructing a charge pump according to the designs provided herein are described.
    Type: Application
    Filed: December 15, 2010
    Publication date: November 24, 2011
    Applicant: CANAAN MICROELECTRONICS CORPORATION LIMITED
    Inventors: Chi Wah Kok, Oi Ying Wong, Wing Shan Tam
  • Patent number: 7414562
    Abstract: An asynchronous cyclic current-mode analog-to-digital converter (ADC) is disclosed. The ADC comprises a plurality of sub-ADCs cascading from the first stage to the last stage, each sub-ADC comprising a current-mode ADC having a digital output, an analog current input, a reference current input and an analog current output. The analog current input of each stage, except the first stage, is operatively connected to the analog current output of the immediately preceding stage. The plurality of sub-ADCs are configured to operate without synchronization with each other.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: August 19, 2008
    Assignee: Intellectual Ventures Fund 27 LLC
    Inventors: Chi Wah Kok, Wing Shan Tam
  • Publication number: 20080024346
    Abstract: An asynchronous cyclic current-mode analog-to-digital converter (ADC) is disclosed. The ADC comprises a plurality of sub-ADCs cascading from the first stage to the last stage, each sub-ADC comprising a current-mode ADC having a digital output, an analog current input, a reference current input and an analog current output. The analog current input of each stage, except the first stage, is operatively connected to the analog current output of the immediately preceding stage. The plurality of sub-ADCs are configured to operate without synchronization with each other.
    Type: Application
    Filed: July 25, 2006
    Publication date: January 31, 2008
    Applicant: Promax Technology (Hong Kong) Limited
    Inventors: Chi Wah Kok, Wing Shan Tam