Abstract: Variable length instructions are formed for execution in a processing system. Each instruction includes a parameter portion having one or more of predetermined types of parameters and an opcode portion. The opcode portion specifies an operation to be performed, the number of parameters in the instruction, and definitive characteristics of the parameters. The parameters may represent data which is compressible, thereby enabling the size of parameters in an instruction to be reduced.

Abstract: Object oriented processing is performed by holding pointers to memory locations of object variables and method tables in dedicated registers. The pointers for current and previous operations of the processor are held in respective first and second groups of the dedicated registers. For each object, the respective object variables are stored at a memory location and the pointer to a respective method table is stored at a memory location indexed off of the location of the object variables.

Abstract: A method is provided for avoiding the corruption of information which can occur when a processor nests subroutines and these subroutines disable and enable interrupts.

Abstract: Rapid thread processing is achieved by transferring complete thread contexts between a memory and a context register set. Each thread context is read from a respective memory location in response to either a designated interrupt or an instruction.

Abstract: Rapid thread processing is performed by associating thread contexts stored in a remote memory with interrupts for controlling the operation of a hardware-accelerated processor. This both minimizes the use of registers in the processor and provides a flexible, remotely accessible storage medium for the thread contexts.

Abstract: A simulation system for simulating transfer operation of blocks of data in a target data storage unit such as an optical compact disk read only memory. Blocks of the data are contained in a memory to which a simulation computer has direct access without requiring that the target data storage unit be operatively connected to the simulation computer. Simulation comprises the steps of characterizing a hypothetical transfer of data operation of the target data storage unit by calculating its performance characteristics for the particular transfer operation in units of time; controlling direct access by the simulation computer to the data in the memory in accordance with the calculated performance time, and providing the results of the direct access simulation to the user. Simultaneous simulations of the target data storage unit may be carried out for the same or different types of host computers.