Patents by Inventor Wirojana Tantraporn

Wirojana Tantraporn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7439529
    Abstract: A high current density ion beam source includes a plasma source for generating plasma, a vacuum chamber coupled to the plasma source for extracting an ion beam from the plasma generated by the plasma source, a microwave field source configured to produce a microwave field that causes an ionization of gas within the plasma source, and a direct current voltage source configured to initiate an avalanche multiplication within the plasma source. The avalanche multiplication increases the ionization of gas in the plasma source and causes an increase in a current density of the ion beam.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: October 21, 2008
    Assignee: The Thailand Research Fund
    Inventors: Wirojana Tantraporn, Surawut Kitsumpun
  • Publication number: 20050218816
    Abstract: A high current density ion beam source includes a plasma source for generating plasma, a vacuum chamber coupled to the plasma source for extracting an ion beam from the plasma generated by the plasma source, a microwave field source configured to produce a microwave field that causes an ionization of gas within the plasma source, and a direct current voltage source configured to initiate an avalanche multiplication within the plasma source. The avalanche multiplication increases the ionization of gas in the plasma source and causes an increase in a current density of the ion beam.
    Type: Application
    Filed: February 11, 2005
    Publication date: October 6, 2005
    Inventors: Wirojana Tantraporn, Surawut Kitsumpun
  • Patent number: 5898585
    Abstract: A novel solar inverter circuit is used to connect a solar photovoltaic (PV) array with an alternating current (AC) voltage source to convert direct current (DC) power from the PV array to AC power. The solar inverter circuit employs the current-voltage (I-V) characteristic of the PV or solar cell, and an H-Bridge circuit with gate controller. The gate controller synchronizes the H-bridge with the AC voltage source. The PV array and the solar inverter circuit can plug directly into a residential AC plug and provides electrical power as a supplementary AC supply. Electrical energy required by the home appliances is supplied by the municipal AC line and solar energy concurrently. Advantages of the solar inverter circuit of the present invention include the flexibility of using the solar inverter circuit with any number of solar cell panels through the implementation of an impedance transformer, and the implementation of an additional, optional output for DC battery charging.
    Type: Grant
    Filed: May 29, 1997
    Date of Patent: April 27, 1999
    Assignee: Premier Global Corporation, Ltd.
    Inventors: Wichit Sirichote, Wirojana Tantraporn, Narong Saengkaew
  • Patent number: 5576533
    Abstract: A circuit for converting solar energy into ac power for supplementary household power has a number of solar photovoltaic cells connected in parallel in groups, with the various groups connected in series (30), and a bridge arrangement of four switching devices (31, 32, 33, 34) each operated to pass current in one direction, with the series-connected groups of cells (30) connected between positive and negative bridge terminals (1, 2), and means for connecting the bridge arms (3, 4) across the primary coils of a transformer (312), with the secondary coils thereof connected to the switching devices to control the phase of passed current, the output at the bridge arms (3, 4) being connectable to the household ac.
    Type: Grant
    Filed: October 17, 1994
    Date of Patent: November 19, 1996
    Assignee: Premier Global Corporation Ltd.
    Inventor: Wirojana Tantraporn
  • Patent number: 4648174
    Abstract: A multiple-zone junction termination extension region is formed adjacent a reverse-blocking junction in a semiconductor device to increase the breakdown voltage of such device. A single mask is used to form the multiple-zone JTE region, with the mask having different patterns of openings in the different zones of the mask. Adjacent openings are maintained with a center-to-center spacing of less than 25 percent of the depletion width of the reverse-blocking junction in a voltage-supporting semiconductor layer adjoining the reverse-blocking junction at the ideal breakdown voltage of the junction. As a consequence, the resulting non-uniformities in doping of the various zones of the JTE region are negligibly small. An alternative JTE region is finely-graduated in dopant level from one end of the region to the other, as opposed to having multiple zones of discrete doping levels.
    Type: Grant
    Filed: February 5, 1985
    Date of Patent: March 10, 1987
    Assignee: General Electric Company
    Inventors: Victor A. K. Temple, Wirojana Tantraporn
  • Patent number: 4336099
    Abstract: The single crystal growth of GaAs is highly anisotropic under certain conditions. A wafer of GaAs is masked and exposed to the vapor only through a long, narrow slot in the <110> direction. A thin ribbon of single crystal GaAs grows out of the slot at a high rate along the <112> vector and has {111} plane major faces and {110} plane edges. This ribbon is flexible. A H.sub.2 -AsCl.sub.3 -Ga epitaxy system is modified to permit retraction of the ribbon as it grows and thus the production of long ribbons.
    Type: Grant
    Filed: March 6, 1981
    Date of Patent: June 22, 1982
    Assignee: General Electric Company
    Inventor: Wirojana Tantraporn
  • Patent number: 4262296
    Abstract: A high frequency field effect transistor of gallium arsenide or other III-V semiconductor compounds has a preferentially etched trapezoidal groove structure in the top surface which creates parallel trapezoidal semiconductor fingers that are wider at the top than at the bottom. Schottky gates or junction gates are fabricated within the grooves surrounding the elongated fingers. The vertical conducting channels between the gates are narrow leading to a high blocking gain, and more contact area is available at the top of the device.
    Type: Grant
    Filed: July 27, 1979
    Date of Patent: April 14, 1981
    Assignee: General Electric Company
    Inventors: James R. Shealy, Bantval J. Baliga, Wirojana Tantraporn, Peter V. Gray
  • Patent number: 4129879
    Abstract: An interdigitated field effect transistor for high power, high frequency applications has a vertical configuration with current flow essentially normal to the surface, as compared to planar devices in which current flow is parallel to the surface. Each channel region is of the same conductivity type as the source and drain regions and is in a mesa structure surrounded by the gate metallization such that the gate metal forms an electronically blocking contact to the channel semiconductor. The device geometry has a natural strip line configuration.
    Type: Grant
    Filed: May 22, 1978
    Date of Patent: December 12, 1978
    Assignee: General Electric Company
    Inventors: Wirojana Tantraporn, Se P. Yu
  • Patent number: 4109169
    Abstract: A semiconductor controlled avalanche triode operableat microwave frequencies is turned on by a narrow pulse, and remains conducting due to the positive feedback effect of returning carriers in the base region until turned off by an opposite polarity narrow pulse. Applications include a fast switch, a memory device, and various logic circuits such as logic gates and shift registers. The memory and logic devices are fast, require low power, available in npn or pnp configurations, are simple with one triode per memory, and can be made of silicon so as to be integrable.
    Type: Grant
    Filed: December 6, 1976
    Date of Patent: August 22, 1978
    Assignee: General Electric Company
    Inventors: Wirojana Tantraporn, Se Puan Yu