Patents by Inventor Witold Gora

Witold Gora has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11531085
    Abstract: A radar system may include a set of analog components to perform one or more radio frequency (RF) operations during an active radar phase of the radar system. The radar system may include a set of digital components to perform one or more digital processing operations during at least a digital processing phase of the radar system. The one or more digital processing operations may be performed such that performance of the one or more digital processing operations does not overlap performance of a substantive portion of the one or more RF operations.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: December 20, 2022
    Assignee: Infineon Technologies AG
    Inventors: Witold Gora, Ljudmil Anastasov, Thomas Langschwert, Bejoy Mathews
  • Publication number: 20200355791
    Abstract: A radar system may include a set of analog components to perform one or more radio frequency (RF) operations during an active radar phase of the radar system. The radar system may include a set of digital components to perform one or more digital processing operations during at least a digital processing phase of the radar system. The one or more digital processing operations may be performed such that performance of the one or more digital processing operations does not overlap performance of a substantive portion of the one or more RF operations.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 12, 2020
    Inventors: Witold GORA, Ljudmil ANASTASOV, Thomas LANGSCHWERT, Bejoy MATHEWS
  • Patent number: 10637489
    Abstract: A circuit for detecting a signal disturbance comprising a high-pass filter, a comparator, an asynchronous counter, a synchronizer, and processing circuitry. The high-pass filter is configured to generate a filtered signal from a monitored signal. The comparator is configured to generate a compare result signal based on a comparison of the filtered signal and a threshold reference. The asynchronous counter is configured to generate a count value of threshold crossings based on the compare result signal. The synchronizer is configured to generate a synchronous output signal for storage at digital memory that is based on the count signal value. The processing circuitry is configured to determine that a disturbance has occurred at the monitored signal based on the synchronous output signal.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: April 28, 2020
    Assignee: Infineon Technologies AG
    Inventor: Witold Gora
  • Patent number: 10303386
    Abstract: According to one embodiment, a data processing device is described including a non-volatile memory configured to store configuration data for the data processing device, a volatile memory and a control system configured to copy the configuration data from the non-volatile memory to a section of the volatile memory, block writing to the section of the volatile memory and to put the data processing device into a hibernation mode in which the non-volatile memory is inactive and the volatile memory is active.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: May 28, 2019
    Assignee: Infineon Technologies AG
    Inventors: Peter Blicharski, Witold Gora, Leong Kee Chee
  • Publication number: 20170344302
    Abstract: According to one embodiment, a data processing device is described including a non-volatile memory configured to store configuration data for the data processing device, a volatile memory and a control system configured to copy the configuration data from the non-volatile memory to a section of the volatile memory, block writing to the section of the volatile memory and to put the data processing device into a hibernation mode in which the non-volatile memory is inactive and the volatile memory is active.
    Type: Application
    Filed: May 30, 2017
    Publication date: November 30, 2017
    Inventors: Peter Blicharski, Witold Gora, Leong Kee Chee
  • Patent number: 9740837
    Abstract: An apparatus and corresponding method for preventing cloning of code. The apparatus includes a memory, an authentication module, and a device. The memory is configured to store the code, which includes unencrypted code and a fragment of encrypted code. The authentication module is configured to receive and decrypt the fragment of encrypted code from the memory into a fragment of decrypted code, and to store the fragment of decrypted code in an authentication module buffer. The device configured to execute the unencrypted code from the memory and to execute the fragment of decrypted code from the authentication module buffer, wherein the fragment of encrypted code is personalized to the device.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: August 22, 2017
    Assignee: Infineon Technologies AG
    Inventors: Witold Gora, Andreas Geiler, Gerd Dirscherl, Albrecht Mayer
  • Publication number: 20160042160
    Abstract: An apparatus and corresponding method for preventing cloning of code. The apparatus includes a memory, an authentication module, and a device. The memory is configured to store the code, which includes unencrypted code and a fragment of encrypted code. The authentication module is configured to receive and decrypt the fragment of encrypted code from the memory into a fragment of decrypted code, and to store the fragment of decrypted code in an authentication module buffer. The device configured to execute the unencrypted code from the memory and to execute the fragment of decrypted code from the authentication module buffer, wherein the fragment of encrypted code is personalized to the device.
    Type: Application
    Filed: August 6, 2014
    Publication date: February 11, 2016
    Inventors: Witold Gora, Andreas Geiler, Gerd Dirscherl, Albrecht Mayer