Abstract: An optical transceiver module coupled to a device is provided. The optical transceiver module includes an electronic signal transmitting terminal coupled to a receiving terminal of the device, an electronic signal receiving terminal coupled to a transmitting terminal of the device, an optical signal receiving terminal coupled to the electronic signal transmitting terminal, and an optical signal transmitting terminal coupled to the electronic signal receiving terminal. When the optical transceiver module is at an normal operation state and the electronic signal receiving terminal does not receive any electronic signal over a first predetermined time period, the optical transceiver module enters a idle detection state to make the electronic signal transmitting terminal to perform a receiver termination detection to the device to determine whether the device is coupled to the optical transceiver module.

Abstract: An optical transceiver module coupled to a device is provided. The optical transceiver module includes an electronic signal transmitting terminal coupled to a receiving terminal of the device, an electronic signal receiving terminal coupled to a transmitting terminal of the device, an optical signal receiving terminal coupled to the electronic signal transmitting terminal, and an optical signal transmitting terminal coupled to the electronic signal receiving terminal. When the optical transceiver module is at an normal operation state and the electronic signal receiving terminal does not receive any electronic signal over a first predetermined time period, the optical transceiver module enters a idle detection state to make the electronic signal transmitting terminal to perform a receiver termination detection to the device to determine whether the device is coupled to the optical transceiver module.

Abstract: A processing device coupled to a host device via a connection device and including a connection port, a control unit and a switching unit is disclosed. The connection port connects to the connection device. The control unit controls a switching signal according to the kind of the connection device when the connection port is coupled between the connection port and the host device. The switching unit transmits an external power to the control unit according to the switching signal. When the switching unit transmits the external power to the control unit, the control unit operates according to the external power provided by an external device. When the switching unit does not transmit the external power to the control unit, the control unit operates according to a host power provided by the host device.

Abstract: A processing device coupled to a host device via a connection device and including a connection port, a control unit and a switching unit is disclosed. The connection port connects to the connection device. The control unit controls a switching signal according to the kind of the connection device when the connection port is coupled between the connection port and the host device. The switching unit transmits an external power to the control unit according to the switching signal. When the switching unit transmits the external power to the control unit, the control unit operates according to the external power provided by an external device. When the switching unit does not transmit the external power to the control unit, the control unit operates according to a host power provided by the host device.

Abstract: A system and method for controlling flash memory is provided for a flash memory controller to use a control interface to read the state register of at least a flash memory with received data for operation to detect whether the flash memory has already finished the operation on the received data without using an RB signal, and when the operation on the received data is to read, the controller can execute the state data switch so that the IO of flash memory can output correct flash memory data for read, or when the operation on the received data is to write, the controller can execute another data operation to save time and accelerate the data operation speed of the flash memory.

Abstract: A system and method for controlling flash memory is provided, so that the flash memory controller can, without using the RB signal, use control interface to read the state register of at least a flash memory with received data for operation to detect whether the flash memory has already finishing operation on the received data, and when the operation on received data is to read, the controller can execute the state data switch so that the IO of flash memory can output correct flash memory data for read, or when the operation on received data is to write, the controller can execute another data operation to save time and accelerate the data operation speed of the flash memory.