Abstract: A split sparse directory for a distributed shared memory multiprocessor system with multiple nodes, each node including a plurality of processors, each processor having an associated cache. The split sparse directory is in a memory subsystem which includes a coherence controller, a temporary state buffer and an external directory. The split sparse directory stores information concerning the cache lines in the node, with the temporary state buffer holding state information about transient cache lines and the external directory holding state information about non-transient cache lines.

Abstract: The present invention provides for the scheduling of requests to one resource from a plurality of initiator devices. In one embodiment, scheduling of requests within threads and scheduling of initiator device access is performed wherein requests are only reordered between threads.

Abstract: The present invention provides for the scheduling of requests to one resource from a plurality of initiator devices. In one embodiment, scheduling of requests within threads and scheduling of initiator device access is performed wherein requests are only reordered between threads.

Abstract: The present invention provides for the scheduling of requests to one resource from a plurality of initiator devices. In one embodiment, scheduling of requests within threads and scheduling of initiator device access is performed wherein requests are only reordered between threads.

Abstract: The present invention is directed to a method and apparatus for scheduling a resource to meet quality of service guarantees. In one embodiment of three levels of priority, if a channel of a first priority level is within its bandwidth allocation, then a request is issued from that channel. If there are no requests in channels at the first priority level that are within the allocation, requests from channels at the second priority level that are within their bandwidth allocation are chosen. If there are no requests of this type, requests from channels at the third priority level or requests from channels at the first and second levels that are outside of their bandwidth allocation are issued. The system may be implemented using rate.

Abstract: A method for communicating between nodes of a plurality of nodes is disclosed. Each node includes a plurality of processors and an interconnect chipset. The method issues a request for data from a processor in a first node and passes the request for data to other nodes through an expansion port (or scalability port). The method also starts an access of a memory in response to the request for data and snoops a processor cache of each processor in each node. The method accordingly identifies the location of the data in either the processor cache or memory in the node having the processor issuing the request or in a processor cache or memory of another node. A method for requesting data between two directly coupled nodes in a router system is also disclosed. A method for requesting data between three or more nodes in an interconnect system is also disclosed. A method for resolving crossing cases in an interconnect system is also disclosed.

Abstract: A pipelined network is disclosed which provides for at least one mode to control the state of a response flag and when the target device is unable to respond to an initiator device request.

Abstract: A computer architecture for avoiding a deadlock condition in an interconnection network comprises a messaging buffer having a size pre-calculated to temporarily store outgoing messages from a node. Messages are classified according to their service requirements and messaging protocols, and reserved quotas in the messaging buffer are allocated for different types of messages. The allocations of the reserved quotas are controlled by a mechanism that, to prevent overflow, limits the maximum number of messages that can be outstanding at any time. The messaging buffer is sized large enough to guarantee that a node is always able to service incoming messages, thereby avoiding deadlock and facilitating forward progress in communications. The buffer may be bypassed to improve system performance when the buffer is empty or when data in the buffer is corrupted.

Abstract: A communication system. One embodiment includes at least two functional blocks, wherein an first functional block communicates with a second functional block by establishing a connection. A connection is a logical state in which data may pass between the first functional block and the second functional block. One embodiment includes a bus coupled to each of the functional blocks and configured to carry a plurality of signals. The plurality of signals includes a thread identifier that indicates a transaction stream that the data transfer is part of and a busy signal identified by the thread identifier. The busy signal is issued by the target functional block when resources will be unavailable to perform a transfer.

Abstract: The present invention relates to rare earth metal sulfide or oxysulfide pigments and yttrium sulfide or oxysulfide pigments based on platelet-shaped substrates.

Abstract: An algorithm for selecting a directory entry in a multiprocessor-node system. In response to a memory request from a processor in a processor node, the algorithm finds an available entry to store information about the requested memory line. If at least one entry is available, then the algorithm uses one of the available entries. Otherwise, the algorithm searches for a “shared” entry. If at least one shared entry is available, then the algorithm uses one of the shared entries. Otherwise, the algorithm searches for a “dirty” entry. If at least one dirty entry is available, then the algorithm uses one of the dirty entries. In selecting a directory entry, the algorithm uses a “least-recently-used” (LRU) algorithm because an entry that was not recently used is more likely to be stale. Further, to improve system performance, the algorithm preferably uses a shared entry before using a dirty entry.

Abstract: A system and method for acknowledging receipt of messages within a packet based communication network. A sending node generates a data packet within an upper layer, and transmits the data packet to a receiving node using a lower layer. The lower layer generates and transmits a pseudo reply packet to the upper layer in response to an acknowledgment received from the receiving node. The pseudo reply packet notifies the upper layer of the sending node that the receiving node successfully received the data packet and removes the burden of having an upper layer of the receiving node generate an actual reply packet.

Abstract: A system and method for providing service guarantees for data flows between an initiator component and a target component. For each data flow, a set of channels is selected to carry the data flow from initiator to target. The individual performance guarantees of the selected channels are aligned to be uniform in units and the individual guarantees are aggregated to provide an end-to-end service guarantee for a particular flow.

Abstract: The present invention consists of a cache coherence protocol within a cache coherence unit for use in a data processing system. The data processing system is comprised of multiple nodes, each node having a plurality of processors with associated caches, a memory, and input/output. The processors within the node are coupled to a memory bus operating according to a “snoopy” protocol. This invention includes a cache coherence protocol for a sparse directory in combination with the multiprocessor nodes. In addition, the invention has the following features: the current state and information from the incoming bus request are used to make an immediate decision on actions and next state; the decision mechanism for outgoing coherence is pipelined to follow the bus; and the incoming coherence pipeline acts independently of the outgoing coherence pipeline.

Abstract: The present invention relates generally to efficient message passing support and memory access protections in scalable shared memory multiprocessing computer systems. In a multiprocessor system, processors need to communicate with one another to coordinate their work. Prior art multiprocessors only permit message passing or unprotected direct memory access. The present invention allows direct memory access with protection. The mechanism of the present invention permits processors to directly access each other's memory while retaining protection against faulty software or hardware. Security in the face of malicious intent of the communicating software is not maintained in the preferred embodiment, although a variation of the mechanism provides additional protection against malicious software albeit at the expense of slightly more complex hardware.

Abstract: The present invention generally relates to a system and method for a message protocol to extend cache coherence management of scalable shared memory multiprocessing computer systems having a plurality of processors connected to an interconnection over which the plurality of processors communicate with each other. Each processor communicates with other interconnection processors by sending and receiving messages on the interconnection by means of a messaging protocol which can be used for shared-memory computer systems, shared nothing computer systems, and hybrid computer systems in which some processors are sharing memory while others are not. With this invention a processor node is able to tell whether an incoming message is from within the same coherence group (in which case it is completely unprotected) or whether it is from outside the coherence group (in which case the shared-nothing protections apply).

Abstract: A multiprocessor system includes a plurality of nodes and an interconnect that includes routers. Each node includes a reliable packet mover and a fast frame mover. The reliable packet mover provides packets to the fast frame mover which adds routing information to the packet to form a frame. The route to each node is predetermined. The frame is provided to the routers which delete the route from the routing information. If the frame is lost while being routed, the router discards the frame. If the packet is received at a destination node, the reliable packet mover in that node sends an acknowledgment to the source node if the packet passes an error detection test. The reliable packet mover in the source node resends the packet if it does not receive an acknowledgment in a predetermined time. The fast frame mover randomly selects the route from a plurality of predetermined routes to the destination node according to a probability distribution.

Abstract: A system and method dynamically determines the topology of a source node routing network while having a minimal effect on network performance and without requiring expensive hardware to implement. A source node generates a ping frame. The source node transmits the ping frame to a first source router that is coupled to the source node. The first router transparently identifies the frame as a ping frame and creates an echo frame that is transmitted back to the source node. The first router identifies the port from which the ping frame is received and places this information in the header of the echo frame along with an echo frame identifier. The source node receives the echo frame and identifies routers and nodes to which a ping frame has not been sent based upon the connectivity information in the received echo frame. The source node continue generating and transmitting ping frame to all nodes and routers in the network.

Abstract: New salicylic acid derivatives of the general formula I ##STR1## in which R.sup.1 is H or CH.sub.3,R.sup.2 is 4-(4-methyl-2-thiazolyl)-piperazino, 4-(tetrahydro-2-furoyl)-piperazino, 4-(4-methyl-2-thiazolyl)-homopiperazino, 4-benzamidopiperidino, 6,7-dimethoxy-1,2,3,4-tetrahydroisoquinolino, 1-imidazolyl, tribromo-1-imidazolyl or 2-(3-indolyl-1,1-dimethyl-ethylamino andR.sup.3 is alkoxy having 1-C atoms, NH.sub.2 or alkylamino having 1-4 C atoms,as well as the physiologically acceptable acid addition salts thereof, exhibit effects on the circulation, especially effects lowering the blood pressure and relieving the heart, and diuretic effects.

Abstract: New analgesic compositions containing a compound of the formula I ##STR1## wherein .dbd.A--B.dbd. is .dbd.CH--CH.dbd. or --N--CR.sup.2 .dbd.,Alk is an alkylene group having 2-4 C atoms,R.sup.1 is H, dialkylaminoalkyl, carboxyalkyl, alkoxycarbonylalkyl, carbamoylalkyl, N-alkylcarbamoylalkyl or N,N-dialkylcarbamoylalkyl,Y is CH or N,Z is a bond or --CO--,Ar is a phenyl, thienyl or pyridyl group which is unsubstituted or substituted one or more times by alkyl, alkoxy, F, Cl, Br, I and/or CF.sub.3, andR.sup.2 is H, alkyl, alkoxy or alkylthio,in which the alkyl, alkoxy and alkylthio groups each contain 1-4 C atoms, and/or one of its physiologically acceptable salts.