Abstract: An electronic device and a method for manufacturing such an electronic device are described. The electronic device includes an electronic component, and a component carrier in which the electronic component is embedded. The component carrier includes a first component carrier part having a first cut-out portion and a second component carrier part having a second cut-out portion, the first cut-out portion and the second cut-out portion facing opposite main surfaces of the electronic component. An electrically conductive material is provided on the surface of the first cut-out portion and on the surface of the second cut-out portion. The first cut-out portion and the second cut-out portion respectively form a first cavity and a second cavity on opposite sides of the electronic component.

Abstract: An electronic device and a method for manufacturing such an electronic device are described. The electronic device includes an electronic component, and a component carrier in which the electronic component is embedded. The component carrier includes a first component carrier part having a first cut-out portion and a second component carrier part having a second cut-out portion, the first cut-out portion and the second cut-out portion facing opposite main surfaces of the electronic component. An electrically conductive material is provided on the surface of the first cut-out portion and on the surface of the second cut-out portion. The first cut-out portion and the second cut-out portion respectively form a first cavity and a second cavity on opposite sides of the electronic component.

Abstract: The present device comprises a power divider network, to which a signal to be amplified is applied, for distributing the power of the signal among several amplifying channels, one amplifier per amplifying channel for amplifying the power-divided signal, and a power combiner circuit for combining the amplified signals at the output of each channel into a single signal, the RF power desired at the output of the device determining the number of amplified signals to be combined, the amplifier of each channel comprising an integrated circuit including a controllable output transistor for deactivating the amplifier, the power combiner circuit comprising a quarter wave impedance transformer circuit for each channel connected to a common junction node coupled to the device output.

Abstract: The present device comprises a power divider network (1′), to which a signal (E) to be amplified is applied, for distributing the power of said signal among several amplifying channels, one amplifier (22) per amplifying channel for amplifying the power-divided signal, and a power combiner circuit (5) for combining the amplified signals at the output of each channel into a single signal, the RF power desired at the output of the device determining the number of amplified signals to be combined, the amplifier (22) of each channel comprising an integrated circuit including a controllable output transistor for deactivating the amplifier, the power combiner circuit (5) comprising a quarter wave impedance transformer circuit (51) for each channel connected to a common junction node coupled to the device output (S).

Abstract: Disclosed is a high-efficiency amplifying device wherein a control signal for a power-amplifying unit is produced from an input signal in a pre-amplification stage, resulting in a reduced disturbance output signal with a constant efficiency in the amplifying device.

Abstract: The invention concerns a beam forming network for radiofrequency antennas and applying to the input signals a two-dimensional hexagonal discrete Fourier transform in order to control radiating elements for generating multiple beams. The number of inputs and outputs is equal to N.sub.t with N.sub.t =R.times.N.sup.2, R and N being integers. A first circuit layer comprises a row of N.sup.2 cells each having R inputs and R outputs, each cell receiving a signal present at one of said N.sub.t inputs and applying to the signals present at its R inputs a one-dimensional R.times.R discrete Fourier transform, and a second circuit layer comprises R independent sets of cells each having N inputs and N outputs, each set including a first row and a second row of N cells, each cell applying to the signals present at its N inputs a one-dimensional R.times.R discrete Fourier transform.The invention also concerns a hardware structure for a network of this kind.

Abstract: The electrode consists of a metal carrier (1) and a surface layer (3), which has been deposited on the carrier and has a thickness of 0.1 to 20 .mu.m and consists of a material which differs from the carrier material and distinguishes from the carrier material by having a smaller work function and lower thermal and electrical conductivities and is selected from the group tungsten, niobium, tantalum, rhenium and chromium. The carrier (1) consists of a deeply drawable material. There is preferably also an interlayer (2) made of a highly conductive metal.