Patents by Inventor Wolfgang Janisch
Wolfgang Janisch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10249499Abstract: A method for manufacturing a vertical power semiconductor device is provided, wherein a first impurity is provided at the first main side of a semiconductor wafer. A first oxide layer is formed on the first main side of the wafer, wherein the first oxide layer is partially doped with a second impurity in such way that any first portion of the first oxide layer which is doped with the second impurity is spaced away from the semiconductor wafer by a second portion of the first oxide layer which is not doped with the second impurity and which is disposed between the first portion of the first oxide layer and the first main side of the semiconductor wafer. Thereafter a carrier wafer is bonded to the first oxide layer. During front-end-of-line processing on the second main side of the semiconductor wafer, the second impurity is diffused from the first oxide layer into the semiconductor wafer from its first main side by heat generated during the front-end-of-line processing.Type: GrantFiled: March 15, 2017Date of Patent: April 2, 2019Assignee: ABB Schweiz AGInventors: Wolfgang Janisch, Atze de Vries, Sven Matthias
-
Publication number: 20180151367Abstract: A method for manufacturing a vertical power semiconductor device is provided, wherein a first impurity is provided at the first main side of a semiconductor wafer. A first oxide layer is formed on the first main side of the wafer, wherein the first oxide layer is partially doped with a second impurity in such way that any first portion of the first oxide layer which is doped with the second impurity is spaced away from the semiconductor wafer by a second portion of the first oxide layer which is not doped with the second impurity and which is disposed between the first portion of the first oxide layer and the first main side of the semiconductor wafer. Thereafter a carrier wafer is bonded to the first oxide layer. During front-end-of-line processing on the second main side of the semiconductor wafer, the second impurity is diffused from the first oxide layer into the semiconductor wafer from its first main side by heat generated during the front-end-of-line processing.Type: ApplicationFiled: March 15, 2017Publication date: May 31, 2018Inventors: WOLFGANG JANISCH, ATZE DE VRIES, SVEN MATTHIAS
-
Patent number: 9782823Abstract: A forging device for producing a piston blank has a forging mold that has an essentially cylindrical cavity matching the radial outer surface of the piston blank, a forging base delimiting the cavity, and a central die consisting of a mandrel that has a conically tapering extension which is mounted on the mandrel and the shape of which matches the inner surface of the piston blank. In order to form the radially outer surfaces of the piston slipper walls and a peripheral cooling pocket located radially outside the slipper walls in the piston head, the forging device has two lateral jaws which are mounted in the forging device so as to be movable at an angle to the longitudinal axis of the forging device.Type: GrantFiled: October 5, 2012Date of Patent: October 10, 2017Assignee: MAHLE International GmbHInventors: Roland Grunert, Juergen Friedrich, Timo Seng, Wolfgang Janisch, Armin Wenzel
-
Patent number: 9664445Abstract: The invention relates to a tubular reactor with a rotating reactor chamber (9) for thermal treatment of biomass. It is characterized by the reactor chamber (9) being subdivided into zones by ring-shaped plates (10). These zones cause the particles to be retained in a particular area and thoroughly mixed there, i.e., the particles being treated are homogenized and the retention time also becomes more homogenous.Type: GrantFiled: August 3, 2012Date of Patent: May 30, 2017Assignee: Global Intelligent Fuel ABInventors: Klaus Trattner, Heinrich Pauli, Wolfgang Plienegger, Wolfgang Janisch
-
Patent number: 9000480Abstract: A reverse-conducting semiconductor device (RC-IGBT) including a freewheeling diode and an insulated gate bipolar transistor (IGBT), and a method for making the RC-IGBT are provided. A first layer of a first conductivity type is created on a collector side before a second layer of a second conductivity type is created on the collector side. An electrical contact in direct electrical contact with the first and second layers is created on the collector side. A shadow mask is applied on the collector side, and a third layer of the first conductivity type is created through the shadow mask. At least one electrically conductive island, which is part of a second electrical contact in the finalized RC-IGBT, is created through the shadow mask. The island is used as a mask for creating the second layer, and those parts of the third layer which are covered by the island form the second layer.Type: GrantFiled: April 11, 2013Date of Patent: April 7, 2015Assignee: ABB Technology AGInventors: Munaf Rahimo, Wolfgang Janisch, Eustachio Faggiano
-
Publication number: 20150020566Abstract: A forging device for producing a piston blank has a forging mold that has an essentially cylindrical cavity matching the radial outer surface of the piston blank, a forging base delimiting the cavity, and a central die consisting of a mandrel that has a conically tapering extension which is mounted on the mandrel and the shape of which matches the inner surface of the piston blank. In order to form the radially outer surfaces of the piston slipper walls and a peripheral cooling pocket located radially outside the slipper walls in the piston head, the forging device has two lateral jaws which are mounted in the forging device so as to be movable at an angle to the longitudinal axis of the forging device.Type: ApplicationFiled: October 5, 2012Publication date: January 22, 2015Applicant: MAHLE International GmbHInventors: Roland Grunert, Juergen Friedrich, Timo Seng, Wolfgang Janisch, Armin Wenzel
-
Patent number: 8829571Abstract: A maximum-punch-through semiconductor device such as an insulated gate bipolar transistor (IGBT) or a diode, and a method for producing same are disclosed. The MPT semiconductor device can include at least a two-layer structure having an emitter metallization, a channel region, a base layer with a predetermined doping concentration ND, a buffer layer and a collector metallization. A thickness W of the base layer can be determined by: W = V bd + V pt 4010 ? ? kV ? ? cm - 5 / 8 * ( N D ) 1 / 8 wherein a punch-through voltage Vpt of the semiconductor device is between 70% and 99% of a break down voltage Vbd of the semiconductor device, and wherein the thickness W is a minimum thickness of the base layer between a junction to the channel region and the buffer layer.Type: GrantFiled: May 10, 2012Date of Patent: September 9, 2014Assignee: ABB Technology AGInventors: Munaf Rahimo, Arnost Kopta, Jan Vobecky, Wolfgang Janisch
-
Publication number: 20130228823Abstract: A reverse-conducting semiconductor device (RC-IGBT) including a freewheeling diode and an insulated gate bipolar transistor (IGBT), and a method for making the RC-IGBT are provided. A first layer of a first conductivity type is created on a collector side before a second layer of a second conductivity type is created on the collector side. An electrical contact in direct electrical contact with the first and second layers is created on the collector side. A shadow mask is applied on the collector side, and a third layer of the first conductivity type is created through the shadow mask. At least one electrically conductive island, which is part of a second electrical contact in the finalized RC-IGBT, is created through the shadow mask. The island is used as a mask for creating the second layer, and those parts of the third layer which are covered by the island form the second layer.Type: ApplicationFiled: April 11, 2013Publication date: September 5, 2013Applicant: ABB TECHNOLOGY AGInventors: Munaf RAHIMO, Wolfgang Janisch, Eustachio Faggiano
-
Patent number: 8450793Abstract: A controlled-punch-through semiconductor device with a four-layer structure is disclosed which includes layers of different conductivity types, a collector on a collector side, and an emitter on an emitter side which lies opposite the collector side. The semiconductor device can be produced by a method performed in the following order: producing layers on the emitter side of wafer of a first conductivity type; thinning the wafer on a second side; applying particles of the first conductivity type to the wafer on the collector side for forming a first buffer layer having a first peak doping concentration in a first depth, which is higher than doping of the wafer; applying particles of a second conductivity type to the wafer on the second side for forming a collector layer on the collector side; and forming a collector metallization on the second side.Type: GrantFiled: April 2, 2010Date of Patent: May 28, 2013Assignee: ABB Technology AGInventors: Munaf Rahimo, Jan Vobecky, Wolfgang Janisch, Arnost Kopta, Frank Ritchie
-
Patent number: 8435863Abstract: A reverse-conducting semiconductor device (RC-IGBT) including a freewheeling diode and an insulated gate bipolar transistor (IGBT), and a method for making the RC-IGBT are provided. A first layer of a first conductivity type is created on a collector side before a second layer of a second conductivity type is created on the collector side. An electrical contact in direct electrical contact with the first and second layers is created on the collector side. A shadow mask is applied on the collector side, and a third layer of the first conductivity type is created through the shadow mask. At least one electrically conductive island, which is part of a second electrical contact in the finalized RC-IGBT, is created through the shadow mask. The island is used as a mask for creating the second layer, and those parts of the third layer which are covered by the island form the second layer.Type: GrantFiled: June 21, 2010Date of Patent: May 7, 2013Assignee: ABB Technology AGInventors: Munaf Rahimo, Wolfgang Janisch, Eustachio Faggiano
-
Publication number: 20130078589Abstract: The invention relates to a tubular reactor with a rotating reactor chamber (9) for thermal treatment of biomass. It is characterized by the reactor chamber (9) being subdivided into zones by ring-shaped plates (10). These zones cause the particles to be retained in a particular area and thoroughly mixed there, i.e., the particles being treated are homogenized and the retention time also becomes more homogenous.Type: ApplicationFiled: August 3, 2012Publication date: March 28, 2013Inventors: Klaus Trattner, Heinrich Pauli, Wolfgang Plienegger, Wolfgang Janisch
-
Publication number: 20120280272Abstract: A maximum-punch-through semiconductor device such as an insulated gate bipolar transistor (IGBT) or a diode, and a method for producing same are disclosed. The MPT semiconductor device can include at least a two-layer structure having an emitter metallization, a channel region, a base layer with a predetermined doping concentration ND, a buffer layer and a collector metallization. A thickness W of the base layer can be determined by: W = V bd + V pt 4010 ? ? kV ? ? cm - 5 / 8 * ( N D ) 1 / 8 wherein a punch-through voltage Vpt of the semiconductor device is between 70% and 99% of a break down voltage Vbd of the semiconductor device, and wherein the thickness W is a minimum thickness of the base layer between a junction to the channel region and the buffer layer.Type: ApplicationFiled: May 10, 2012Publication date: November 8, 2012Applicant: ABB Technology AGInventors: Munaf RAHIMO, Arnost KOPTA, Jan VOBECKY, Wolfgang JANISCH
-
Publication number: 20100270587Abstract: A reverse-conducting semiconductor device (RC-IGBT) including a freewheeling diode and an insulated gate bipolar transistor (IGBT), and a method for making the RC-IGBT are provided. A wafer has first and second sides emitter and collector sides of the IGBT, respectively. At least one layer of a first or second conductivity type is created on the second side before at least one layer of a different conductivity type is created on the second side. The at least one layer of the first or second conductivity type and the at least one layer of the different conductivity type are arranged alternately in the finalized RC-IGBT. A second electrical contact, which is in direct electrical contact with the layers of the first or second and different conductivity types, is created on the second side. A shadow mask is applied on the second side, and the layer of the first or second conductivity type is created through the shadow mask.Type: ApplicationFiled: June 21, 2010Publication date: October 28, 2010Applicant: ABB TECHNOLOGY AGInventors: Munaf RAHIMO, Wolfgang Janisch, Eustachio Faggiano
-
Publication number: 20100244093Abstract: A controlled-punch-through semiconductor device with a four-layer structure is disclosed which includes layers of different conductivity types, a collector on a collector side, and an emitter on an emitter side which lies opposite the collector side. The semiconductor device can be produced by a method performed in the following order: producing layers on the emitter side of wafer of a first conductivity type; thinning the wafer on a second side; applying particles of the first conductivity type to the wafer on the collector side for forming a first buffer layer having a first peak doping concentration in a first depth, which is higher than doping of the wafer; applying particles of a second conductivity type to the wafer on the second side for forming a collector layer on the collector side; and forming a collector metallization on the second side.Type: ApplicationFiled: April 2, 2010Publication date: September 30, 2010Applicant: ABB Technology AGInventors: Munaf Rahimo, Jan Vobecky, Wolfgang Janisch, Arnost Kopta, Frank Ritchie