Patents by Inventor Wolfgang Jantscher

Wolfgang Jantscher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180138266
    Abstract: A method of producing a semiconductor device includes providing a semiconductor body including a semiconductor body material having a dopant diffusion coefficient that is smaller than the corresponding dopant diffusion coefficient of silicon. At least one first semiconductor region doped with dopants of a first conductivity type is produced in the semiconductor body, including by applying a first implantation of first implantation ions. At least one second semiconductor region adjacent to the at least one first semiconductor region and doped with dopants of a second conductivity type complementary to the first conductivity type is produced in the semiconductor body, including by applying a second implantation of second implantation ions.
    Type: Application
    Filed: December 26, 2017
    Publication date: May 17, 2018
    Inventors: Hans-Joachim Schulze, Wolfgang Jantscher, Roland Rupp, Werner Schustereder, Hans Weber
  • Patent number: 9859361
    Abstract: A semiconductor device includes a semiconductor body having a semiconductor body material with a dopant diffusion coefficient that is smaller than the corresponding dopant diffusion coefficient of silicon, at least one first semiconductor region doped with dopants of a first conductivity type and having a columnar shape that extends into the semiconductor body along an extension direction, wherein a respective width of the at least one first semiconductor region continuously increases along the extension direction; and at least one second semiconductor region included in the semiconductor body. The at least one second semiconductor region is arranged adjacent to the at least one first semiconductor region, and is doped with dopants of a second conductivity type complementary to the first conductivity type.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: January 2, 2018
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Wolfgang Jantscher, Roland Rupp, Werner Schustereder, Hans Weber
  • Publication number: 20170373140
    Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.
    Type: Application
    Filed: August 21, 2017
    Publication date: December 28, 2017
    Inventors: Franz Hirler, Stefan Gamerith, Joachim Weyers, Wolfgang Jantscher, Waqas Mumtaz Syed
  • Patent number: 9773863
    Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: September 26, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Hirler, Stefan Gamerith, Joachim Weyers, Wolfgang Jantscher, Waqas Mumtaz Syed
  • Publication number: 20170243938
    Abstract: A method of manufacturing semiconductor devices in a semiconductor wafer comprises forming charge compensation device structures in the semiconductor wafer. An electric characteristic related to the charge compensation device structures is measured. At least one of proton irradiation and annealing parameters are adjusted based on the measured electric characteristic. The semiconductor wafer is irradiated with protons and annealed based on the at least one of the adjusted proton irradiation and annealing parameters. Laser beam irradiation parameters are adjusted with respect to different positions on the semiconductor wafer based on the measured electric characteristic. The semiconductor wafer is irradiated with a photon beam at the different positions on the wafer based on the photon beam irradiation parameters.
    Type: Application
    Filed: May 5, 2017
    Publication date: August 24, 2017
    Applicant: Infineon Technologies Austria AG
    Inventors: Hans Weber, Wolfgang Jantscher, Hans-Joachim Schulze
  • Patent number: 9653540
    Abstract: A method of manufacturing semiconductor devices in a semiconductor wafer comprises forming charge compensation device structures in the semiconductor wafer. An electric characteristic related to the charge compensation device structures is measured. At least one of proton irradiation and annealing parameters are adjusted based on the measured electric characteristic. The semiconductor wafer is irradiated with protons and annealed based on the at least one of the adjusted proton irradiation and annealing parameters. Laser beam irradiation parameters are adjusted with respect to different positions on the semiconductor wafer based on the measured electric characteristic. The semiconductor wafer is irradiated with a photon beam at the different positions on the wafer based on the photon beam irradiation parameters.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: May 16, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans Weber, Wolfgang Jantscher, Hans-Joachim Schulze
  • Publication number: 20160329398
    Abstract: A method of manufacturing semiconductor devices in a semiconductor wafer comprises forming charge compensation device structures in the semiconductor wafer. An electric characteristic related to the charge compensation device structures is measured. At least one of proton irradiation and annealing parameters are adjusted based on the measured electric characteristic. The semiconductor wafer is irradiated with protons and annealed based on the at least one of the adjusted proton irradiation and annealing parameters. Laser beam irradiation parameters are adjusted with respect to different positions on the semiconductor wafer based on the measured electric characteristic. The semiconductor wafer is irradiated with a photon beam at the different positions on the wafer based on the photon beam irradiation parameters.
    Type: Application
    Filed: May 4, 2016
    Publication date: November 10, 2016
    Inventors: Hans Weber, Wolfgang Jantscher, Hans-Joachim Schulze
  • Publication number: 20160233295
    Abstract: A semiconductor device includes a semiconductor body having a semiconductor body material with a dopant diffusion coefficient that is smaller than the corresponding dopant diffusion coefficient of silicon, at least one first semiconductor region doped with dopants of a first conductivity type and having a columnar shape that extends into the semiconductor body along an extension direction, wherein a respective width of the at least one first semiconductor region continuously increases along the extension direction; and at least one second semiconductor region included in the semiconductor body. The at least one second semiconductor region is arranged adjacent to the at least one first semiconductor region, and is doped with dopants of a second conductivity type complementary to the first conductivity type.
    Type: Application
    Filed: February 5, 2016
    Publication date: August 11, 2016
    Inventors: Hans-Joachim Schulze, Wolfgang Jantscher, Roland Rupp, Werner Schustereder, Hans Weber
  • Publication number: 20150333168
    Abstract: A semiconductor device includes a semiconductor body with transistor cells arranged in an active area and absent in an edge area between the active area and a side surface. A field dielectric adjoins a first surface of the semiconductor body and separates, in the edge area, a conductive structure connected to gate electrodes of the transistor cells from the semiconductor body. The field dielectric includes a transition from a first vertical extension to a second, greater vertical extension. The transition is in the vertical projection of a non-depletable extension zone in the semiconductor body, wherein the non-depletable extension zone has a conductivity type of body/anode zones of the transistor cells and is electrically connected to at least one of the body/anode zones.
    Type: Application
    Filed: May 14, 2014
    Publication date: November 19, 2015
    Inventors: Franz Hirler, Stefan Gamerith, Joachim Weyers, Wolfgang Jantscher, Waqas Mumtaz Syed
  • Patent number: 9012980
    Abstract: A method of manufacturing a semiconductor device includes forming a charge compensation device structure in a semiconductor substrate. The method further includes measuring a value of an electric characteristic related to the charge compensation device. At least one of proton irradiation and annealing parameters are adjusted based on the measured value. Based on the at least one of the adjusted proton irradiation and annealing parameters the semiconductor substrate is irradiated with protons, and thereafter, the semiconductor substrate is annealed.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: April 21, 2015
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Hans Weber, Werner Schustereder, Wolfgang Jantscher, Helmut Strack