Abstract: A measuring system (1) comprises a signal generator (2), generating a digital modulated high frequency measuring signal (MS), for supplying to the input (4) of a test unit (4). A signal analyser (5) connected to the output (6) of the test unit (4), analyses the output signal (OS) of the test unit (4) after a demodulation. A direct connection (7) is provided between the signal generator (2) and the signal analyser (5), by means of which a reference signal (Ref) is supplied directly to the signal analyser (5) from the signal generator (2).

Abstract: A signal generator comprises at least one first base band unit and a second base band unit, generating a digital base band signal. At least one first frequency offset unit, connected to the first base band unit, which adds the output signal form the second base band unit and the output signal from the frequency offset unit and an I/Q modulator, in series with the addition unit are provided.

Abstract: A measuring device, in particular a signal generator, comprises several functional units which may be connected to each other in various combinations, a control device which determines the connection and functions of the functional unites, and optical display device. The functional units are symbolized by function blocks which may be represented on the display device and graphically connected by connection elements. The control device controls the display device so that the functional blocks are graphically connected to each other correspondingly to the actual connection of the functional units by the connection elements.

Abstract: The aim of the invention is to generate a digitally modulated test signal, which is generated in the form of a multitude of transmission channels from a digital modulation data stream according to a predetermined digital modulation standard, and which is fed as I and Q values to an I/Q modulator. To this end: a) a portion of the transmission channels is generated, in a modulation coder, directly from an internal or external modulation data stream according to the predetermined modulation standard; b) the I and Q values for at least one portion of the remaining channels are fed as a pre-calculated modulation data sequence of alimited length from a memory to the modulation coder, and; the I and Q values generated according to a) and b) are added and fed to the I/Q modulator.

Abstract: A measuring system (1) comprises a signal generator (2), generating a digital modulated high frequency measuring signal (MS), for supplying to the input (4) of a test unit (4). A signal analyser (5) connected to the output (6) of the test unit (4), analyses the output signal (OS) of the test unit (4) after a demodulation. A direct connection (7) is provided between the signal generator (2) and the signal analyser (5), by means of which a reference signal (Ref) is supplied directly to the signal analyser (5) from the signal generator (2).

Abstract: A signal generator comprises at least one first base band unit and a second base band unit, generating a digital base band signal. At least one first frequency offset unit, connected to the first base band unit, which adds the output signal form the second base band unit and the output signal from the frequency offset unit and an I/Q modulator, in series with the addition unit are provided.

Abstract: A measuring device, in particular a signal generator, comprises several functional units which may be connected to each other in various combinations, a control device which determines the connection and functions of the functional unites, and optical display device. The functional units are symbolized by function blocks which may be represented on the display device and graphically connected by connection elements. The control device controls the display device so that the functional blocks are graphically connected to each other correspondingly to the actual connection of the functional units by the connection elements.

Abstract: For the continuous and interruption-free readout of a data sequence predetermined by a predetermined address sequence from a memory that is constructed of dynamic memory components (DRAM or SDRAM) and that is divided into a number of separately addressable memory banks, the control circuit controlling the readout of the data sequence from the memory cells is operated, and the distribution of the data in the memory cells of the banks is selected, such that another bank is respectively refreshed during the readout of data from one of the banks. The memory contains at least three memory banks and the sequence of the bank addresses is always selected such that, given access to a bank, at least the access onto the preceding bank did not exhibit the same bank address.