Patents by Inventor Wolfgang Mehr

Wolfgang Mehr has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9873949
    Abstract: A method for producing a nanotip from a tip material provides a substrate which consists of the tip material or has the material in the form of a coating, produces a mask from a mask material selected so that, in a predefined reactive ion etching process, the mask material is removed at a lower etching rate than the tip material, and carries out the reactive ion etching process in an etching chamber. The mask material is additionally selected so that a gaseous component is released therefrom during the reactive ion etching process, the gaseous component not being released from the tip material. The method further comprises detecting the gaseous component while the ion etching process is being carried out, repeatedly determining whether an amount of the gaseous component in the etching chamber reaches a predefined lower threshold, and stopping the reactive ion etching process when the lower threshold is reached.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: January 23, 2018
    Assignee: IHP GmbH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS/LEIBNIZ-INSTITUT FUR INNOVATIVE MIKROELEKTRONIK
    Inventors: Wolfgang Mehr, Andre Wolff
  • Patent number: 9590045
    Abstract: A graphene base transistor comprises on a semiconductor substrate surface an emitter pillar and an emitter-contact pillar, which extend from a pillar foundation in a vertical direction. A dielectric filling layer laterally embeds the emitter pillar and the emitter-contact pillar above the pillar foundation. The dielectric filling layer has an upper surface that is flush with a top surface of the emitter pillar and with the at least one base-contact arm of a base-contact structure. A graphene base forms a contiguous layer between a top surface of the emitter pillar and a top surface of the base-contact arm. A collector stack and the base have the same lateral extension parallel to the substrate surface and perpendicular to those edges of the top surface of the emitter pillar and the base-contact arm that face each other.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: March 7, 2017
    Assignee: IHP GMBH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS/LEIBNIZ—INSTITUT FUR INNOVATIVE MIKROELEKTRONIK
    Inventors: Andre Wolff, Wolfgang Mehr, Grzegorz Lupina, Jaroslaw Dabrowski, Gunther Lippert, Mindaugas Lukosius, Chafik Meliani, Christian Wenger
  • Publication number: 20160186333
    Abstract: A method for producing a nanotip from a tip material provides a substrate which consists of the tip material or has the material in the form of a coating, produces a mask from a mask material selected so that, in a predefined reactive ion etching process, the mask material is removed at a lower etching rate than the tip material, and carries out the reactive ion etching process in an etching chamber. The mask material is additionally selected so that a gaseous component is released therefrom during the reactive ion etching process, the gaseous component not being released from the tip material. The method further comprises detecting the gaseous component while the ion etching process is being carried out, repeatedly determining whether an amount of the gaseous component in the etching chamber reaches a predefined lower threshold, and stopping the reactive ion etching process when the lower threshold is reached.
    Type: Application
    Filed: June 13, 2014
    Publication date: June 30, 2016
    Inventors: Wolfgang Mehr, Andre Wolff
  • Publication number: 20160104778
    Abstract: A graphene base transistor comprises on a semiconductor substrate surface an emitter pillar and an emitter-contact pillar, which extend from a pillar foundation in a vertical direction. A dielectric filling layer laterally embeds the emitter pillar and the emitter-contact pillar above the pillar foundation. The dielectric filling layer has an upper surface that is flush with a top surface of the emitter pillar and with the at least one base-contact arm of a base-contact structure. A graphene base forms a contiguous layer between a top surface of the emitter pillar and a top surface of the base-contact arm. A collector stack and the base have the same lateral extension parallel to the substrate surface and perpendicular to those edges of the top surface of the emitter pillar and the base-contact arm that face each other.
    Type: Application
    Filed: May 23, 2014
    Publication date: April 14, 2016
    Inventors: Andre Wolff, Wolfgang Mehr, Grzegorz Lupina, Jaroslaw Dabrowski, Gunther Lippert, Mindaugas Lukosius, Chafik Meliani, Christian Wenger
  • Patent number: 9082809
    Abstract: A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterized in that the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: July 14, 2015
    Assignee: IHP GmbH—Innovations for High Performance Microelectronics
    Inventors: Jaroslaw Dabrowski, Wolfgang Mehr, Johann Christoph Scheytt, Grzegorz Lupina
  • Patent number: 9040956
    Abstract: A depletion-layer transistor comprising a base, an emitter and a collector, in which the emitter contains a tunnel diode which permits a tunnel current of charge carriers from the emitter in the direction of the collector when an emitter-base voltage above a first threshold voltage is applied in the direction of current flow, and in which the base contains a graphene layer.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: May 26, 2015
    Assignee: IHP GmbH—INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS/LEIBNIZ-INSTITUT FUR INNOVATIVE MIKROELEKTRONIK
    Inventors: Wolfgang Mehr, Gunther Lippert
  • Patent number: 8957404
    Abstract: A hot hole transistor with a graphene base comprises on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: February 17, 2015
    Assignee: IHP GmbH—Innovations for High Performance Microelectronics
    Inventors: Wolfgang Mehr, Jaroslaw Dabrowski, Max Lemme, Gunther Lippert, Grzegorz Lupina, Johann Christoph Scheytt
  • Publication number: 20140027715
    Abstract: A hot hole transistor with a graphene base comprises on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer.
    Type: Application
    Filed: December 20, 2012
    Publication date: January 30, 2014
    Applicant: IHP GmbH - Innovations for High Performance Microelectronics
    Inventors: Wolfgang Mehr, Jaroslaw Dabrowski, Max Lemme, Gunther Lippert, Grzegorz Lupina, Johann Christoph Scheytt
  • Publication number: 20120292596
    Abstract: A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterized in that the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer.
    Type: Application
    Filed: May 17, 2012
    Publication date: November 22, 2012
    Applicant: IHP GmbH
    Inventors: Jaroslaw Dabrowski, Wolfgang Mehr, Johann Christoph Scheytt, Grzegorz Lupina
  • Publication number: 20110309335
    Abstract: A depletion-layer transistor comprising a base, an emitter and a collector, in which the emitter contains a tunnel diode which permits a tunnel current of charge carriers from the emitter in the direction of the collector when an emitter-base voltage above a first threshold voltage is applied in the direction of current flow, and in which the base contains a graphene layer.
    Type: Application
    Filed: December 11, 2009
    Publication date: December 22, 2011
    Inventors: Wolfgang Mehr, Gunther Lippert