Abstract: Methods and apparatus for analysis of nano-objects using wide-field bright field transmission techniques are described. Such methods may comprise acquiring a plurality of images of a sample comprising a plurality of nano-objects using bright field illumination via a continuously variable spectral filter, and identifying a nano-object within the sample in the plurality of images, wherein the position of the nano-object changes between images. Using data extracted from the plurality of images, an extinction cross-section of the identified nano-object may be quantitatively determined.

Abstract: Methods and apparatus for analysis of nano-objects using wide-field bright field transmission techniques are described. Such methods may comprise acquiring a plurality of images of a sample (124) comprising a plurality of nano-objects using bright field illumination via a continuously variable spectral filter (114), and identifying a nano-object within the sample in the plurality of images, wherein the position of the nano-object changes between images. Using data extracted from the plurality of images, an extinction cross-section of the identified nano-object may be quantitatively determined.

Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes a semiconductor body having a main surface, the semiconductor body including a drift region of monocrystalline SiC, the drift region being of a first conductivity type, and a metallization arranged at the main surface. In a cross-section which is substantially orthogonal to the main surface, the semiconductor body further includes a contact region of the monocrystalline SiC directly adjoining the drift region and the metallization, and an anode region of a semiconductor material having a lower band-gap than the monocrystalline SiC. The contact region is of a second conductivity type. The anode region is in ohmic contact with the metallization and forms a heterojunction with the drift region.

Abstract: To produce a cost-effective fuse in chip design, which is applied to a carrier substrate made of a Al2O3 ceramic having a high thermal conductivity, and which is provided with a fusible metallic conductor and a cover layer, in which the melting point of the metallic conductor may be defined reliably, it is suggested that an intermediate layer having low thermal conductivity be positioned between the carrier substrate and the metallic conductor, the intermediate layer being formed by a low-melting-point inorganic glass paste applied in the screen-printing method or an organic intermediate layer applied in island printing. Furthermore, a method for manufacturing the fuse is specified.

Abstract: A method for producing a MEMS device comprises forming a semiconductor layer stack, the semiconductor layer stack comprising at least a first monocrystalline semiconductor layer, a second monocrystalline semiconductor layer and a third monocrystalline semiconductor layer, the second monocrystalline semiconductor layer formed between the first and third monocrystalline semiconductor layers. A semiconductor material of the second monocrystalline semiconductor layer is different from semiconductor materials of the first and third monocrystalline semiconductor layers. After forming the semiconductor layer stack, at least a portion of each of the first and third monocrystalline semiconductor layers is concurrently etched.

Abstract: A transistor component includes in a semiconductor body a source zone and a drift zone of a first conduction type, and a body zone of a second conduction type complementary to the first conduction type, the body zone arranged between the drift zone and the source zone. The transistor component further includes a source electrode in contact with the source zone and the body zone, a gate electrode adjacent the body zone and dielectrically insulated from the body zone by a gate dielectric layer, and a diode structure connected between the drift zone and the source electrode. The diode structure includes a first emitter zone adjoining the drift zone in the semiconductor body, and a second emitter zone of the first conduction type adjoining the first emitter zone. The second emitter zone is connected to the source electrode and has an emitter efficiency ? of less than 0.7.

Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes a semiconductor body having a main surface, the semiconductor body including a drift region of monocrystalline SiC, the drift region being of a first conductivity type, and a metallization arranged at the main surface. In a cross-section which is substantially orthogonal to the main surface, the semiconductor body further includes a contact region of the monocrystalline SiC directly adjoining the drift region and the metallization, and an anode region of a semiconductor material having a lower band-gap than the monocrystalline SiC. The contact region is of a second conductivity type. The anode region is in ohmic contact with the metallization and forms a heterojunction with the drift region.

Abstract: A method of manufacturing a structure in a semiconductor body comprises forming a first mask above a first surface of the semiconductor body. The first mask comprises an opening surrounding a first portion of the first mask, thereby separating the first portion and a second portion of the first mask. The semiconductor body is processed through the opening at the first surface. The opening is increased by removing at least part of the first mask in the first portion while maintaining the first mask in the second portion. The semiconductor body is further processed through the opening at the first surface.

Abstract: According to an embodiment of a semiconductor device, the semiconductor device includes a semiconductor body having a main surface, the semiconductor body including a drift region of a first band-gap material, the drift region being of a first conductivity type, and a metallization arranged at the main surface. In a cross-section which is substantially orthogonal to the main surface, the semiconductor body further includes a contact region of the first band-gap material directly adjoining the drift region and the metallization, and an anode region of a second band-gap material having a lower band-gap than the first band-gap material. The contact region is of a second conductivity type. The anode region is in ohmic contact with the metallization and forms a heterojunction with the drift region.

Abstract: The present invention relates to an absorbent article having a body-facing surface and a transverse centerline, comprising; a hydrophilic topsheet, a backsheet joined to the topsheet, and an absorbent core disposed between the topsheet and the backsheet, and a lateral topsheet on each longitudinal side of the body-facing surface of the absorbent article so that at least a part thereof covers the topsheet where the topsheet covers the absorbent core, wherein the lateral topsheet comprises an embedded zone along the longitudinal direction of the absorbent article comprising a plurality of compressed areas where the lateral topsheet and the topsheet are jointly compressed so that the lateral topsheet is embedded into the topsheet, and wherein the lateral topsheet in the compressed areas is one layer.

Abstract: Disclosed is a method for repairing a receiving hook for guide vanes, wherein the receiving hook is arranged in a housing of a turbomachine. The method comprises removing first material in a region of the receiving hook, which region extends over the circumference of the housing and thereafter applying second material in or on a region which extends over the circumference of the housing. The application of second material is performed using localized heat.

Abstract: In order to provide a method for isolating a circuit and a thermal link, wherein the link has a very low resistance and is suitable for high currents, in particular very high short load currents, and also has a high degree of reliability, in particular under difficult conditions, such as thermal and mechanical loading which lasts for a relatively long time, for example, the invention proposes that, during the phase transition of the material of the fusible element (10) from the solid to the liquid state, the volume of the fusible element (10) increases and the pressure increases and, owing to the increase in volume and the increase in pressure, the fusible element (10) is dislodged so as to break the electrical connection.

Abstract: A semiconductor component has a semiconductor body zone, a first electrically conductive layer adjacent to the semiconductor body zone, a first dielectric layer with first dielectric properties and a second dielectric layer with second dielectric properties. The first dielectric properties differ from the second dielectric properties. The first dielectric layer and the second dielectric layer are arranged between the semiconductor body zone and the first electrically conductive layer. A second electrically conductive layer is applied between the first dielectric layer and the second dielectric layer. A first voltage divider is switched between the first electrically conductive layer and the semiconductor body zone. The second electrically conductive layer is electrically conductively connected only to the voltage divider.

Abstract: A method for forming a field-effect semiconductor device includes: providing a wafer having a main surface and a first semiconductor layer of a first conductivity type; forming at least two trenches from the main surface partly into the first semiconductor layer so that each of the at least two trenches includes, in a vertical cross-section substantially orthogonal to the main surface, a side wall and a bottom wall, and that a semiconductor mesa is formed between the side walls of the at least two trenches; forming at least two second semiconductor regions of a second conductivity type in the first semiconductor layer so that the bottom wall of each of the at least two trenches adjoins one of the at least two second semiconductor regions; and forming a rectifying junction at the side wall of at least one of the at least two trenches.

Abstract: A transistor includes a source, a drain spaced apart from the source, and a heterostructure body having a two-dimensional charge carrier gas channel for connecting the source and the drain. The transistor further includes a semiconductor field plate disposed between the source and the drain. The semiconductor field plate is configured to at least partly counterbalance charges in the drain when the transistor is in an off state in which the channel is interrupted and a blocking voltage is applied to the drain. The counterbalance charge provided by the semiconductor field plate is evenly distributed over a plane or volume of the semiconductor field plate. Various semiconductor field plate configurations and corresponding manufacturing methods are described herein.

Abstract: A method of manufacturing a structure in a semiconductor body comprises forming a first mask above a first surface of the semiconductor body. The first mask comprises an opening surrounding a first portion of the first mask, thereby separating the first portion and a second portion of the first mask. The semiconductor body is processed through the opening at the first surface. The opening is increased by removing at least part of the first mask in the first portion while maintaining the first mask in the second portion. The semiconductor body is further processed through the opening at the first surface.

Abstract: To produce a cost-effective fuse in chip design, which is applied to a carrier substrate made of a Al2O3 ceramic having a high thermal conductivity, and which is provided with a fusible metallic conductor and a cover layer, in which the melting point of the metallic conductor may be defined reliably, it is suggested that an intermediate layer having low thermal conductivity be positioned between the carrier substrate and the metallic conductor, the intermediate layer being formed by a low-melting-point inorganic glass paste applied in the screen-printing method or an organic intermediate layer applied in island printing. Furthermore, a method for manufacturing the fuse is specified.

Abstract: A method for manufacturing a semiconductor substrate includes providing a first wafer having a first surface and a second surface opposite the first surface, forming cavities in the first wafer at a first distance from the first surface, wherein the cavities, when seen in a cross-section perpendicular to the first surface, are laterally spaced from each other by partition walls formed by the semiconductor material of the first wafer, the cavities forming a separation region, bonding a second wafer on the first surface of the first wafer, breaking the partition walls by applying mechanical impact to the partition walls to split the first wafer along the separation region so that a residual wafer remains attached to the second wafer, and depositing an epitaxial layer on the residual wafer.