Patents by Inventor Wolfram Ernst

Wolfram Ernst has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5052030
    Abstract: In order to replace a reference clock s.sub.R, as needed, and without phase shift, with another clock f, the latter clock must be synchronized to the reference clock in frequency and in phase. Since the reference clock can fail or can be disturbed, undesirable synchronizations often occur in such cases. An error-free, phase-wise optimal synchronization of the two clocks is achieved and synchronization is carried out as a rule only when a defined edge of the reference clock appears within a time range defined with reference to the clock f.
    Type: Grant
    Filed: April 2, 1990
    Date of Patent: September 24, 1991
    Assignee: Siemens Aktiengesellschaft
    Inventors: Wolfram Ernst, Gerhard Uhlig
  • Patent number: 5027375
    Abstract: A network is synchronized by a hierarchical adjustment and the individual exchanges are equipped with frequency monitors for the reference frequencies that synchronize them, which, when activated, switch the center to another reference frequency or change it to the hold-over mode. When one of these exchanges is resynchronized, the rate-of-change of its reference frequency output signal of its central clock pulse generator is limited so that no frequency alarms are triggered in downstream exchanges synchronized by this exchange.
    Type: Grant
    Filed: September 19, 1989
    Date of Patent: June 25, 1991
    Assignee: Siemens Aktiengesellschaft
    Inventor: Wolfram Ernst
  • Patent number: 4980899
    Abstract: A method and apparatus for synchronization of a clock generator, especially a clock generator of a digital telecommunications exchange. When there is a brief outage of the reference frequency, the voltage controlled oscillator of the phase control circuit whose output frequency determines the frequency of the clock generator continues to operate with the control voltage prevailing until then. Upon resumption of the reference frequency, the phase difference between the reference frequency and the output frequency of the oscillator is measured and corrected with the value of the valid phase difference before the loss of the reference frequency. The corrected value is used as the basis for resumed frequency control.
    Type: Grant
    Filed: May 26, 1989
    Date of Patent: December 25, 1990
    Assignee: Siemens AG
    Inventors: Marcel-Abraham Troost, Wolfram Ernst, Franz Lindwurm
  • Patent number: 4922489
    Abstract: A circuit configuration for the routine testing of the clock supply of a large number of digital TDM telecommunication units operated with the same clock, wherein a clock supply with stand-by generator through a corresponding arrangement of several monitor circuits and arrangements of on/alter switches, the operatability of the monitor circuits themselves can be tested so that on routine testing independent of the switching position of a change-over switching device effective upon switching a generator from stand-by operation to active operation respectively the same generator always acts upon the partial distribution system.
    Type: Grant
    Filed: September 14, 1988
    Date of Patent: May 1, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventor: Wolfram Ernst
  • Patent number: 4914404
    Abstract: Process for synchronization of a frequency to an interference-prone reference frequency. Loss of the steady-state phase relationship between frequency and reference frequency which is maintained during the control process because of either phase shifts or necessary switching to another reference frequency causes a permanent phase deviation (random walk) in some cases because of the interference-prone reference frequencies until the steady-state phase relationship is restored.
    Type: Grant
    Filed: May 26, 1989
    Date of Patent: April 3, 1990
    Assignee: Siemens Aktiengesellschaft
    Inventor: Wolfram Ernst
  • Patent number: 4821256
    Abstract: The switching network is tested by comparison of bit streams coming from the double part switching network parts; other parts of the exchange are tested by parity checking. Evaluation takes place at a central location; when a parity error is found in the transmission in a direction of transmission, the parity bit generated for transmission in the other direction of transmission is falsified.
    Type: Grant
    Filed: June 25, 1987
    Date of Patent: April 11, 1989
    Assignee: Siemens Aktiengesellschaft
    Inventors: Lothar Schmidt, Gerhard Schaich, Wolfram Ernst
  • Patent number: 4053793
    Abstract: A modular logic circuit capable of performing a plurality of different logic functions is described. A first portion of the modular circuit containing logic elements receives input pulse signals and, responsive to signals received from a control circuit forming a second portion of the modular circuit, produces an output pulse having time position and/or length relationships to the input pulses which are functions of the values of the signals from the control circuit. A third portion of the modular circuit receives input pulses having no relationship to the inputs to the first portion; logic circuits in the third portion receive the latter input pulses and signals from the control circuit and produce another output signal the length and/or time position of which in relation to the input pulses is determined by the signals from the control unit.
    Type: Grant
    Filed: March 25, 1976
    Date of Patent: October 11, 1977
    Assignee: Siemens Aktiengesellschaft
    Inventors: Wolfram Ernst, Josef Rohrig, Gerhard Renz