Abstract: Termination structure for a pattern, especially an at least partially regular spaced pattern used in the manufacturing of semiconductor devices, especially DRAM-chips, wherein the termination structure comprises at least a first line-shaped element and at least one extension element adjacent to the first line-shaped element partially increasing the width of the first line-shaped element.

Abstract: An imaging system having a dipole diaphragm (2) having two diaphragm openings (2b) arranged one behind the other in a dipole axis (y), and a mask having mask structures (20, 23) is used for producing semiconductor structures (10?, 13?) on a wafer (15?) by imaging the mask (25) onto the wafer (15?). The dipole diaphragm (2) is provided for the imaging of the mask (25), and the mask (25), for producing main semiconductor structures (10; 10?) on the wafer (15?), has main mask structures (20) parallel to an imaging axis (x) running perpendicular to the dipole axis (y). At least one connecting mask structure (23?) oriented obliquely with respect to the dipole axis (y) at least in sections is formed on the mask (25), which structure connects at least two main mask structures (20) to one another.

Abstract: A method is used to produce semiconductor patterns (10?, 13?) on a wafer (15?). For this purpose, a mask (25) and a dipole aperture (2) with two aperture openings (2b) arranged behind one another in a dipole axis (y) are used. The mask (25) is imaged on the wafer (15?) by means of the dipole aperture (2) and, by the imaging of the mask (25) on the wafer (15?), main semiconductor patterns (10?) are produced which are aligned perpendicularly to the dipole axis (y) and in parallel with an imaging axis (x). A second mask (35) with at least one connecting mask pattern (33) is imaged on the wafer (15?) by means of a second aperture (6), as a result of which a connecting semiconductor pattern (13) is produced on the wafer (15?), by means of which at least two of the main semiconductor patterns (10?) are connected to one another.

Abstract: A wafer holder has a set of minimum contact wafer support members predefining support member contacting portions on a planar wafer surface of a wafer. The wafer chuck has a wafer support region for contacting the planar wafer surface. The wafer support region of the chuck includes recesses configured at predefined positions corresponding to support member contacting portions of the lower wafer surface. The wafer handling system further includes a wafer transport device including a rotational position adjusting device for adjusting the rotational position of a wafer that is transported between the wafer holder and the wafer chuck. Thereby, elevations on the lower wafer surface, like scratches or deposited material which are produced by the contact between the support members and the wafer, are encapsulated by the recesses of the wafer chuck. A method for moving a wafer between a wafer holder and a wafer chuck is also provided.

Abstract: A recycling procedure for 300 mm nitride dummy wafers which have a stabilization layer of silicon dioxide is provided. The recycling procedure is essentially based on selectively wet etching the deposited silicon nitride with respect to the silicon dioxide stabilization layer, preferably with hot phosphoric acid at 160° C. In particular, a method of handling a silicon wafer which is employed as a dummy wafer during a nitride deposition process includes the steps of depositing a silicon dioxide layer on the wafer surface, performing the nitride deposition process on the wafer to deposit silicon nitride or silicon oxinitride on the wafer surface until a predetermined layer thickness is reached, and etching the silicon nitride or silicon oxinitride layer selectively with respect to the silicon dioxide layer.