Abstract: Method and arrangement for the functional testing of computers used in the control of processes. A data word signal generated by the computer is compared in a comparator with a test word of the same bit length generated by a pseudo-random number generator. When the two words are completely coincident, the comparator issues a trigger pulse to two non-retriggerable monoflops which provide a time frame and the function of which is acknowledged dynamically to the computer through an acknowledgement line, which provides a shift clock pulse for the pseudo-random number generator upon the lapse of the window frame. When a fault arises in the computer or in the check unit, an alarm unit is triggered through an NOR gate to transfer the process into a defined safe state. All faults in the check unit itself can be detected by the computer through acknowledgement lines.