Patents by Inventor Wolmer Chiarottino

Wolmer Chiarottino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4800423
    Abstract: An interface module for superimposing alphanumeric characters upon external GB video signals received by a SCART connector of a television set is disclosed. The interface includes a central processing unit (CPU) controlling the command input from an alphanumeric keyboard, remote control, touch screen functions, and message exchange with a processing center through the D channel of an ISDN network. The CPU controls a video display processor which outputs a switching signal to the SCART connector and R, G, B video signals to an encoder which encodes a composite color signal in a standard format such as PAL, SECAM or NTSC. The superimposing is done in the SCART connector by switching between the external R, G, B video signals and the composite color video from the encoder.
    Type: Grant
    Filed: November 6, 1987
    Date of Patent: January 24, 1989
    Assignee: Sip- Societa Italiana per L'Esercizio Delle Telecomunicazioni S.P.A.
    Inventors: Silvano Appiano, Wolmer Chiarottino, Mauro Pozzi, Aldo Reali
  • Patent number: 4366535
    Abstract: A signal-processing system, e.g. for a telephone exchange, comprises n modular processing units each including a pair of identical microprocessors operating in parallel on binary signals arriving over an internal bus, only one microprocessor of each pair being enabled to transmit outgoing messages to that bus while the other operates as a dummy. The two microprocessors are interlinked by a correlating connection enabling verification of their correct operation in response to microinstructions read out from respective microprogram memories thereof under the control of a common clock. A momentary divergence, resulting from a relative lag in the response of one microprocessor to an asynchronously arriving signal bit, results in a delay of the microprogram by one clock cycle to permit resynchronization; longer-lasting disparities lead to a deactivation of the microprocessor pair and to the emission of an alarm signal.
    Type: Grant
    Filed: January 14, 1980
    Date of Patent: December 28, 1982
    Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni S.p.A.
    Inventors: Riccardo Cedolin, Wolmer Chiarottino, Giuseppe Giandonato, Silvano Giorcelli, Giorgio Martinengo, Giorgio Sofi, Sergio Villone