Patents by Inventor Won Beom Choi

Won Beom Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9293181
    Abstract: A block selection circuit and a semiconductor device having the same may include a row decoder which includes a high voltage generating circuit configured to output a block selection voltage in response to upper addresses, switching circuits configured to receive the block selection voltage and a precharge high voltage, and forward the block selection voltage through one of the switching circuits that is selected in response to selection signals, and pass transistor groups configured to select a memory block in response to the forwarded block selection voltage.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: March 22, 2016
    Assignee: SK Hynix Inc.
    Inventors: Bon Kwang Koo, Won Beom Choi
  • Patent number: 9257903
    Abstract: A pumping circuit includes a cross-coupled charge pump circuit including first and second capacitors configured to pump an input voltage in response to a first clock signal and to an inverted first clock signal and a plurality of transistors configured to one of transfer the input voltage to the first and second capacitors and to transfer a pumping voltage to an output node, and a switching voltage supply circuit configured to supply switching voltages to gates of the plurality of transistors to enable the transfer of the input voltage and the pumping voltage.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: February 9, 2016
    Assignee: SK Hynix Inc.
    Inventors: Hwang Huh, Won Beom Choi
  • Patent number: 9104220
    Abstract: A regulator includes an input voltage adjusting unit configured to adjust a pumping voltage in response to a control signal varied depending on a target voltage and output the adjusted pumping voltage and a regulation unit configured to output the target voltage by regulating the adjusted pumping voltage. The regulator may reduce current consumption by adjusting the pumping voltage inputted according to the target voltage.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: August 11, 2015
    Assignee: SK Hynix Inc.
    Inventor: Won Beom Choi
  • Publication number: 20150188418
    Abstract: A pumping circuit includes a cross-coupled charge pump circuit including first and second capacitors configured to pump an input voltage in response to a first clock signal and to an inverted first clock signal and a plurality of transistors configured to one of transfer the input voltage to the first and second capacitors and to transfer a pumping voltage to an output node, and a switching voltage supply circuit configured to supply switching voltages to gates of the plurality of transistors to enable the transfer of the input voltage and the pumping voltage.
    Type: Application
    Filed: June 5, 2014
    Publication date: July 2, 2015
    Inventors: Hwang HUH, Won Beom CHOI
  • Publication number: 20140347949
    Abstract: A block selection circuit and a semiconductor device having the same may include a row decoder which includes a high voltage generating circuit configured to output a block selection voltage in response to upper addresses, switching circuits configured to receive the block selection voltage and aprecharge high voltage, and forward the block selection voltage through one of the switching circuits that is selected in response to selection signals, and pass transistor groups configured to select a memory block in response to the forwarded block selection voltage.
    Type: Application
    Filed: September 17, 2013
    Publication date: November 27, 2014
    Applicant: SK hynix Inc.
    Inventors: Bon Kwang KOO, Won Beom CHOI
  • Publication number: 20140167713
    Abstract: A regulator includes an input voltage adjusting unit configured to adjust a pumping voltage in response to a control signal varied depending on a target voltage and output the adjusted pumping voltage and a regulation unit configured to output the target voltage by regulating the adjusted pumping voltage. The regulator may reduce current consumption by adjusting the pumping voltage inputted according to the target voltage.
    Type: Application
    Filed: March 18, 2013
    Publication date: June 19, 2014
    Applicant: SK HYNIX INC.
    Inventor: Won Beom CHOI
  • Patent number: 8456921
    Abstract: A nonvolatile memory includes a first bit line coupled to a first cell string, a second bit line coupled to a second cell string, and a bit line precharge unit configured to precharge the first bit line and the second bit line before a program operation. A bit line selected from among the first bit line and the second bit line is precharged to a lower voltage level than a target voltage level, and an unselected bit line is precharged to the target voltage level.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: June 4, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Won-Beom Choi
  • Patent number: 8339191
    Abstract: A reference voltage generation circuit includes a driving control unit configured to output an enable signal during a first time period in response to a power-on reset (POR) signal, a reference voltage generation unit configured to have an initial operation determined in response to the enable signal and to output a reference voltage maintained at a constant voltage level after the first time period, and a reference voltage control unit configured to fix the voltage level of the reference voltage to a first voltage upon a voltage level of the reference voltage being increased to at least a set voltage level.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: December 25, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Won Beom Choi
  • Publication number: 20120169405
    Abstract: An apparatus for generating an output voltage includes a boosting circuit configured to generate the output voltage by boosting an input voltage based on a boosting rate, and a pump level controller configured to control the boosting rate in response to the input voltage.
    Type: Application
    Filed: July 12, 2011
    Publication date: July 5, 2012
    Inventor: Won-Beom CHOI
  • Publication number: 20120119815
    Abstract: A switching circuit of a semiconductor apparatus includes a first switching unit configured to substantially prevent a leakage current applied from an outside and simultaneously switch a first signal with a first high voltage bias level, and a second switching unit configured to switch a second signal with a second high voltage bias according to the first high voltage bias level. The first switching unit and the second switching unit are selectively switched by a first enable signal and a second enable signal, which are applied from an outside, to generate a global bias signal.
    Type: Application
    Filed: August 25, 2011
    Publication date: May 17, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Won Beom Choi
  • Publication number: 20120008417
    Abstract: A nonvolatile memory includes a first bit line coupled to a first cell string, a second bit line coupled to a second cell string, and a bit line precharge unit configured to precharge the first bit line and the second bit line before a program operation. A bit line selected from among the first bit line and the second bit line is precharged to a lower voltage level than a target voltage level, and an unselected bit line is precharged to the target voltage level.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 12, 2012
    Inventor: Won-Beom CHOI
  • Publication number: 20110292737
    Abstract: A nonvolatile memory apparatus includes: a plurality of drain selection switches coupled to a plurality of memory cell strings, respectively; and a drain selection switch controller configured to selectively drive a drain selection switch coupled to an even bit line or a drain selection switch coupled to an odd bit line, in response to a page address and a global drain selection signal.
    Type: Application
    Filed: December 31, 2010
    Publication date: December 1, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Won Beom CHOI
  • Publication number: 20100283516
    Abstract: A reference voltage generation circuit includes a driving control unit configured to output an enable signal during a first time period in response to a power-on reset (POR) signal, a reference voltage generation unit configured to have an initial operation determined in response to the enable signal and to output a reference voltage maintained at a constant voltage level after the first time period, and a reference voltage control unit configured to fix the voltage level of the reference voltage to a first voltage upon a voltage level of the reference voltage being increased to at least a set voltage level.
    Type: Application
    Filed: December 28, 2009
    Publication date: November 11, 2010
    Inventor: Won Beom CHOI
  • Patent number: 7696795
    Abstract: A power-on reset circuit includes a power detector to generate a detect voltage by detecting an internal voltage. An output unit outputs a power-up reset signal using the detect voltage. A delay unit is configured to delay the power-up reset signal and generate a delay voltage. A switch device is configured to be controlled using the delay voltage. A discharge unit discharges the detect voltage in response to the internal voltage and the power-up reset signal.
    Type: Grant
    Filed: May 21, 2007
    Date of Patent: April 13, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Won Beom Choi
  • Publication number: 20080100351
    Abstract: A power-on reset circuit includes a power detector to generate a detect voltage by detecting an internal voltage. An output unit outputs a power-up reset signal using the detect voltage. A delay unit is configured to delay the power-up reset signal and generate a delay voltage. A switch device is configured to be controlled using the delay voltage. A discharge unit discharges the detect voltage in response to the internal voltage and the power-up reset signal.
    Type: Application
    Filed: May 21, 2007
    Publication date: May 1, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventor: Won Beom Choi