Patents by Inventor Won Chon

Won Chon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9703991
    Abstract: There is provided a programmable multiplier circuit for multiplying an input voltage signal by a binary coefficient, the multiplier circuit including a transconductor including a first amplifying transistor configured to convert the input voltage signal to a current signal, the first amplifying transistor having a gate configured to receive the input voltage signal, and a coefficient multiplier coupled to the transconductor and configured to multiply the current signal by the binary coefficient to generate an amplified current signal.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: July 11, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Denpol Kultran, Won Chon, Harry B. Marr
  • Patent number: 9626533
    Abstract: There is provided a programmable multiplier circuit for multiplying an input voltage signal by a binary coefficient, the multiplier circuit including a transconductor including a first amplifying transistor configured to convert the input voltage signal to a current signal, the first amplifying transistor having a gate configured to receive the input voltage signal, and a coefficient multiplier coupled to the transconductor and configured to multiply the current signal by the binary coefficient to generate an amplified current signal.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: April 18, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Denpol Kultran, Won Chon, Harry B. Marr
  • Publication number: 20170070210
    Abstract: There is provided a programmable multiplier circuit for multiplying an input voltage signal by a binary coefficient, the multiplier circuit including a transconductor including a first amplifying transistor configured to convert the input voltage signal to a current signal, the first amplifying transistor having a gate configured to receive the input voltage signal, and a coefficient multiplier coupled to the transconductor and configured to multiply the current signal by the binary coefficient to generate an amplified current signal.
    Type: Application
    Filed: September 9, 2015
    Publication date: March 9, 2017
    Inventors: Denpol Kultran, Won Chon, Harry B. Marr
  • Patent number: 7724061
    Abstract: An active clamp circuit for electronic components includes two sets of diode connected transistors that are inversely connected in parallel across an output of the component for providing both positive and negative differential conducting paths. The diode connected transistors cooperatively operate to limit a differential output voltage between the positive and negative conducting paths. An emitter follower buffer includes the clamp circuit and is configured to limit RF energy incident to an analog to digital converter (ADC). The emitter follower buffer includes two input transistors having their emitters each connected to at least one diode connected transistor connected to the clamp circuit. A receiver includes the differential amplifier and an analog to digital converter. A method for limiting the energy of analog signals in the receiver includes the step of operating the clamp circuit to limit the analog signals transmitted to the analog to digital converter (ADC).
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 25, 2010
    Assignee: Raytheon Company
    Inventors: Won Chon, Nick J. Rosik, Harry H. Kim, Gregory D. Surbeck, Gharib Gharibianians, Dean W. Schoettler
  • Publication number: 20090110117
    Abstract: An active clamp circuit for electronic components includes two sets of diode connected transistors that are inversely connected in parallel across an output of the component for providing both positive and negative differential conducting paths. The diode connected transistors cooperatively operate to limit a differential output voltage between the positive and negative conducting paths. An emitter follower buffer includes the clamp circuit and is configured to limit RF energy incident to an analog to digital converter (ADC). The emitter follower buffer includes two input transistors having their emitters each connected to at least one diode connected transistor connected to the clamp circuit. A receiver includes the differential amplifier and an analog to digital converter. A method for limiting the energy of analog signals in the receiver includes the step of operating the clamp circuit to limit the analog signals transmitted to the analog to digital converter (ADC).
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Inventors: Won Chon, Nick J. Rosik, Harry H. Kim, Gregory D. Surbeck, Gharib Gharibianians, Dean W. Schoettler