Patents by Inventor Won Chul Do

Won Chul Do has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250038042
    Abstract: Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of semiconductor die comprising electronic devices to an interposer wafer, and applying an underfill material between the die and the interposer wafer. Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. Methods and systems for a semiconductor device package with a die-to-die first bond are disclosed and may include bonding one or more semiconductor die comprising electronic devices to an interposer die.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Inventors: Michael G. Kelly, Ronald Patrick Huemoeller, Won Chul Do, David Jon Hiner
  • Publication number: 20250006686
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Application
    Filed: July 8, 2024
    Publication date: January 2, 2025
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Publication number: 20240421127
    Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: August 30, 2024
    Publication date: December 19, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu, Won Chul Do, Jin Young Khim, Shaun Bowers, Ron Huemoeller
  • Patent number: 12136565
    Abstract: Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of semiconductor die comprising electronic devices to an interposer wafer, and applying an underfill material between the die and the interposer wafer. Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. Methods and systems for a semiconductor device package with a die-to-die first bond are disclosed and may include bonding one or more semiconductor die comprising electronic devices to an interposer die.
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: November 5, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Michael G. Kelly, Ronald Patrick Huemoeller, Won Chul Do, David Jon Hiner
  • Publication number: 20240332032
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.
    Type: Application
    Filed: April 1, 2024
    Publication date: October 3, 2024
    Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
  • Publication number: 20240304550
    Abstract: In one example, a semiconductor device comprises a redistribution layer (RDL) substrate having a top surface and a bottom surface, wherein the RDL substrate comprises a filler-free dielectric material, an electronic device on the top surface of the RDL substrate, an electrical interconnect on the bottom surface of the RDL substrate and electrically coupled to the electronic device, a first protective material contacting a side surface of the electronic device and the top surface of the RDL substrate, and a second protective material contacting a side surface of the electrical interconnect and the bottom surface of the RDL substrate. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: May 20, 2024
    Publication date: September 12, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ki Kim, Jae Beom Shim, Seung Nam Son, Won Chul Do
  • Patent number: 12080682
    Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: September 3, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu, Won Chul Do, Jin Young Khim, Shaun Bowers, Ron Huemoeller
  • Publication number: 20240250035
    Abstract: In one example, an electronic device includes a lower substrate comprising a lower substrate upper side and a lower substrate lower side, and an upper substrate comprising an upper substrate upper side and an upper substrate lower side. The electronic device also includes a first electronic component and a second electronic component coupled to the upper substrate upper side. A first device interconnect and a second device interconnect couple the lower substrate upper side to the upper substrate lower side. The electronic device also includes a connect die coupled to the lower substrate upper side that electrically couples the first electronic component to the second electronic component. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Inventors: Se Hwan Hong, Min Su Jeong, Gam Han Yong, Won Chul Do, Ji Hun Lee, Jae Yoon Kim, Jin Hyuk Chang, Ji Yeon Ryu, Dong Hoon Han
  • Patent number: 12033970
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: July 9, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Publication number: 20240194649
    Abstract: Various aspects of this disclosure provide a semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a stacked die structure and a method of manufacturing thereof.
    Type: Application
    Filed: December 15, 2023
    Publication date: June 13, 2024
    Inventors: Won Geol Lee, Won Chul Do, Ji Hun Yi
  • Patent number: 11990411
    Abstract: In one example, a semiconductor device comprises a redistribution layer (RDL) substrate having a top surface and a bottom surface, wherein the RDL substrate comprises a filler-free dielectric material, an electronic device on the top surface of the RDL substrate, an electrical interconnect on the bottom surface of the RDL substrate and electrically coupled to the electronic device, a first protective material contacting a side surface of the electronic device and the top surface of the RDL substrate, and a second protective material contacting a side surface of the electrical interconnect and the bottom surface of the RDL substrate. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: May 21, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Tae Ki Kim, Jae Beom Shim, Seung Nam Son, Won Chul Do
  • Publication number: 20240153882
    Abstract: In one example, a semiconductor device comprises a first substrate comprising a first conductive structure, a first body over the first conductive structure and comprising an inner sidewall defining a cavity in the first body, a first interface dielectric over the first body, and a first internal interconnect in the first body and the first interface dielectric, and coupled with the first conductive structure. The semiconductor device further comprises a second substrate over the first substrate and comprising a second interface dielectric, a second body over the second interface dielectric, and a second conductive structure over the second body and comprising a second internal interconnect in the second body and the second interface dielectric. An electronic component is in the cavity, and the second internal interconnect is coupled with the first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: January 18, 2024
    Publication date: May 9, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Khim, Won Chul Do, Sang Hyoun Lee, Ji Hun Yi, Ji Yeon Ryu
  • Patent number: 11948808
    Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: April 2, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Dong Jin Kim, Jin Han Kim, Won Chul Do, Jae Hun Bae, Won Myoung Ki, Dong Hoon Han, Do Hyung Kim, Ji Hun Lee, Jun Hwan Park, Seung Nam Son, Hyun Cho, Curtis Zwenger
  • Patent number: 11881458
    Abstract: In one example, a semiconductor device comprises a first substrate comprising a first conductive structure, a first body over the first conductive structure and comprising an inner sidewall defining a cavity in the first body, a first interface dielectric over the first body, and a first internal interconnect in the first body and the first interface dielectric, and coupled with the first conductive structure. The semiconductor device further comprises a second substrate over the first substrate and comprising a second interface dielectric, a second body over the second interface dielectric, and a second conductive structure over the second body and comprising a second internal interconnect in the second body and the second interface dielectric. An electronic component is in the cavity, and the second internal interconnect is coupled with the first internal interconnect. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: January 12, 2023
    Date of Patent: January 23, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Khim, Won Chul Do, Sang Hyoun Lee, Ji Hun Yi, Ji Yeon Ryu
  • Patent number: 11848310
    Abstract: Various aspects of this disclosure provide a semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a stacked die structure and a method of manufacturing thereof.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: December 19, 2023
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Won Geol Lee, Won Chul Do, Ji Hun Yi
  • Publication number: 20230343607
    Abstract: In one example, a semiconductor device can comprise a unit substrate comprising a unit conductive structure and a unit dielectric structure, and an electronic component coupled to the unit conductive structure. The unit substrate can comprise a portion of a singulated subpanel substrate of a panel substrate. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jae Yoon Kim, Ji Hun Lee, Suresh Jayaraman, David Hiner, Won Chul Do, Jin Young Khim, Ju Hong Shin, Kye Ryung Kim
  • Patent number: 11715699
    Abstract: In one example, a semiconductor device, comprises a first redistribution layer (RDL) substrate comprising a first dielectric structure and a first conductive structure through the first dielectric structure and comprising one or more first conductive redistribution layers, an electronic component over the first RDL substrate, wherein the electronic component is coupled with the first conductive structure, a body over a top side of the first RDL substrate, wherein the electronic component is in the body, a second RDL substrate comprising a second dielectric structure over the body, and a second conductive structure through the second dielectric structure and comprising one or more second conductive redistribution layers, and an internal interconnect coupled between the first conductive structure and the second conductive structure. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 1, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Khim, Won Chul Do, Sang Hyoun Lee, Ji Hun Yi, Ji Yeon Ryu
  • Publication number: 20230223365
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Application
    Filed: December 12, 2022
    Publication date: July 13, 2023
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh
  • Patent number: 11694906
    Abstract: In one example, a semiconductor device can comprise a unit substrate comprising a unit conductive structure and a unit dielectric structure, and an electronic component coupled to the unit conductive structure. The unit substrate can comprise a portion of a singulated subpanel substrate of a panel substrate. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: July 4, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jae Yoon Kim, Ji Hun Lee, Suresh Jayaraman, David Hiner, Won Chul Do, Jin Young Khim, Ju Hong Shin, Kye Ryung Kim
  • Publication number: 20230187410
    Abstract: In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 15, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Yi Seul Han, Tae Yong Lee, Ji Yeon Ryu, Won Chul Do, Jin Young Khim, Shaun Bowers, Ron Huemoeller