Patents by Inventor Won-Chul Lim
Won-Chul Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136844Abstract: Disclosed is an apparatus and method for controlling step charging of a secondary battery. A charging control unit determines a SOC, an OCV and a polarization voltage of the secondary battery, determines an OCV deviation corresponding to a difference between the OCV and a predefined minimum OCV value, determines a correction factor corresponding to the polarization voltage and the OCV deviation, determines a look-up SOC by correcting the SOC according to the correction factor, determines the magnitude of a charging current corresponding to the look-up SOC, and provides the determined charging current to a charging device.Type: ApplicationFiled: December 5, 2023Publication date: April 25, 2024Applicant: LG ENERGY SOLUTION, LTD.Inventors: Jin-Hyung LIM, Young-Jin KIM, Gi-Min NAM, Hyoung Jun AHN, Kyu-Chul LEE, Won-Tae JOE
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Patent number: 11936233Abstract: A charging control apparatus measures a first temperature of a first secondary battery selected from the plurality of secondary batteries, a second temperature of a coolant flowing into the cooling device, a charging current of the secondary battery pack, a first terminal voltage of the first secondary battery and a second terminal voltage of a second secondary battery closest to the cooling device, estimates a temperature of a temperature estimation point of the second secondary battery from a lumped thermal model having a thermal resistance between two points selected from the temperature estimation point of the second secondary battery, the first temperature measurement point and the second temperature measurement point, and measurement data about temperature, current and voltage, and determines the estimated temperature as a minimum temperature of the secondary battery pack, and varies a charging power provided to the secondary battery pack according to the minimum temperature.Type: GrantFiled: December 4, 2019Date of Patent: March 19, 2024Assignee: LG ENERGY SOLUTION, LTD.Inventors: Jin-Hyung Lim, Gi-Min Nam, Kyu-Chul Lee, Hyoung Jun Ahn, Won-Tae Joe
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Patent number: 9252055Abstract: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure, to a second side of the wafer so that a laser-scribed layer of the wafer operates as a division starting point. Accordingly, the wafer dicing press reduces laser radiation and pressure-application times for dividing a wafer into semiconductor devices. This increased efficiency is achieved without increasing the likelihood of damaging the wafer.Type: GrantFiled: October 9, 2014Date of Patent: February 2, 2016Assignee: Samsung Electronics Co., Ltd.Inventor: Won-chul Lim
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Publication number: 20150140783Abstract: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure, to a second side of the wafer so that a laser-scribed layer of the wafer operates as a division starting point. Accordingly, the wafer dicing press reduces laser radiation and pressure-application times for dividing a wafer into semiconductor devices. This increased efficiency is achieved without increasing the likelihood of damaging the wafer.Type: ApplicationFiled: October 9, 2014Publication date: May 21, 2015Inventor: Won-chul Lim
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Patent number: 8870047Abstract: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure, to a second side of the wafer so that a laser-scribed layer of the wafer operates as a division starting point. Accordingly, the wafer dicing press reduces laser radiation and pressure-application times for dividing a wafer into semiconductor devices. This increased efficiency is achieved without increasing the likelihood of damaging the wafer.Type: GrantFiled: December 23, 2011Date of Patent: October 28, 2014Assignee: Samsung Electronics Co., Ltd.Inventor: Won-chul Lim
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Patent number: 8431442Abstract: A method of manufacturing semiconductor chips includes providing a semiconductor substrate including circuit regions, irradiating the semiconductor substrate with a laser beam onto to form a frangible layer, and polishing the semiconductor substrate to separate the circuit regions of the semiconductor substrate from one another into semiconductor chips. The frangible layer may be removed completely during the polishing of the semiconductor substrate.Type: GrantFiled: October 5, 2011Date of Patent: April 30, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Sang Wook Park, Tae Gyeong Chung, Ho Geon Song, Won Chul Lim
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Publication number: 20120196426Abstract: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure, to a second side of the wafer so that a laser-scribed layer of the wafer operates as a division starting point. Accordingly, the wafer dicing press reduces laser radiation and pressure-application times for dividing a wafer into semiconductor devices. This increased efficiency is achieved without increasing the likelihood of damaging the wafer.Type: ApplicationFiled: December 23, 2011Publication date: August 2, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Won-chul Lim
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Publication number: 20120115307Abstract: A method of manufacturing semiconductor chips includes providing a semiconductor substrate including circuit regions, irradiating the semiconductor substrate with a laser beam onto to form a frangible layer, and polishing the semiconductor substrate to separate the circuit regions of the semiconductor substrate from one another into semiconductor chips. The frangible layer may be removed completely during the polishing of the semiconductor substrate.Type: ApplicationFiled: October 5, 2011Publication date: May 10, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sang Wook Park, Tae Gyeong Chung, Ho Geon Song, Won Chul Lim
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Patent number: 8159831Abstract: A PCB (printed circuit board) for manufacturing a semiconductor package. The PCB includes a plurality of semiconductor package unit frames; a scribe lane dividing the plurality of semiconductor package unit frames; and a printed circuit pattern for plating directly connected to a plurality of bond fingers on the semiconductor package unit frames and disposed to cross the scribe lane between adjacent semiconductor package unit frames.Type: GrantFiled: January 2, 2009Date of Patent: April 17, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Won-Chul Lim
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Publication number: 20100014264Abstract: A PCB (printed circuit board) for manufacturing a semiconductor package. The PCB includes a plurality of semiconductor package unit frames; a scribe lane dividing the plurality of semiconductor package unit frames; and a printed circuit pattern for plating directly connected to a plurality of bond fingers on the semiconductor package unit frames and disposed to cross the scribe lane between adjacent semiconductor package unit frames.Type: ApplicationFiled: January 2, 2009Publication date: January 21, 2010Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Won-Chul LIM
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Patent number: 7425466Abstract: A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.Type: GrantFiled: February 27, 2007Date of Patent: September 16, 2008Assignee: Samsung Electronics Co., LtdInventor: Won-Chul Lim
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Publication number: 20070290372Abstract: A semiconductor device having a wire loop and a method and apparatus for manufacturing the semiconductor device are provided. The semiconductor device includes a wiring board having an electrode pad, a semiconductor chip having a bonding pad and attached on a top surface of the wiring board while exposing the electrode pad, and a wire loop electrically connecting the bonding pad of the semiconductor chip to the electrode pad of the wiring board. The wire loop includes a contact ball bonded on the bonding pad and a wire extending from a side portion of the contact ball and bonded on the electrode pad of the wiring board.Type: ApplicationFiled: June 11, 2007Publication date: December 20, 2007Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Won-Chul LIM
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Publication number: 20070141754Abstract: A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.Type: ApplicationFiled: February 27, 2007Publication date: June 21, 2007Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Won-Chul LIM
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Patent number: 7199465Abstract: A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.Type: GrantFiled: April 6, 2005Date of Patent: April 3, 2007Assignee: Samsung Electronics Co., Ltd.Inventor: Won-Chul Lim
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Publication number: 20070029650Abstract: A semiconductor package presents Z-shaped outer leads. The outer leads have a first portion located near an upper surface of a package body, a second portion, and a third portion located near a lower surface of a package body. A second similar semiconductor package may be stacked on the first semiconductor package with the third portion of the second semiconductor package located on and electrically connected to the first portion of the first semiconductor package. In each of the first and second semiconductor packages, a distance between the bottom surface of the third portion of the outer lead and the lower surface of a package body may be greater than a distance between the top surface of the first portion of the outer lead and the upper surface of the package body.Type: ApplicationFiled: February 23, 2006Publication date: February 8, 2007Inventors: Won-Chul Lim, Sang-Yeop Lee
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Publication number: 20050236705Abstract: A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.Type: ApplicationFiled: April 6, 2005Publication date: October 27, 2005Inventor: Won-Chul Lim