Patents by Inventor Won Chul SHIN

Won Chul SHIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210328213
    Abstract: A method for preparing a positive electrode active material for a secondary battery is provided. The method includes preparing a lithium composite transition metal oxide including nickel, cobalt, and manganese, wherein the content of the nickel in the total content of the transition metal is 60 mol % or greater. The lithium composite transition metal oxide, MgF2 as a fluorine (F) coating source, and a boron (B) coating source undergoes dry mixing and heat treatment to form a coating portion on the particle surface of the lithium composite transition metal oxide. In addition, a positive electrode active material prepared as described above, is also provided.
    Type: Application
    Filed: September 30, 2019
    Publication date: October 21, 2021
    Applicant: LG Chem, Ltd.
    Inventors: Won Tae Kim, Jong Yeol Yu, Seoung Chul Ha, Sun Sik Shin
  • Patent number: 11114163
    Abstract: Presented herein is a memory device and a method of operating the memory device. The memory device may include a memory cell, and a page buffer coupled to the memory cell via a bit line and configured to perform a read operation on the memory cell. The page buffer may include a storage unit configured to control a bit line precharge operation during the read operation and to store a result value of a first sensing operation. After the bit line precharge operation, a value stored in the storage unit is inverted before the storage unit stores the result value of the first sensing operation.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: September 7, 2021
    Assignee: SK hynix Inc.
    Inventors: Hee Joung Park, Kyeong Seung Kang, Won Chul Shin
  • Publication number: 20200294596
    Abstract: Presented herein is a memory device and a method of operating the memory device. The memory device may include a memory cell, and a page buffer coupled to the memory cell via a bit line and configured to perform a read operation on the memory cell. The page buffer may include a storage unit configured to control a bit line precharge operation during the read operation and to store a result value of a first sensing operation. After the bit line precharge operation, a value stored in the storage unit is inverted before the storage unit stores the result value of the first sensing operation.
    Type: Application
    Filed: June 3, 2020
    Publication date: September 17, 2020
    Applicant: SK hynix Inc.
    Inventors: Hee Joung PARK, Kyeong Seung KANG, Won Chul SHIN
  • Publication number: 20200294597
    Abstract: Presented herein is a memory device and a method of operating the memory device. The memory device may include a memory cell, and a page buffer coupled to the memory cell via a bit line and configured to perform a read operation on the memory cell. The page buffer may include a storage unit configured to control a bit line precharge operation during the read operation and to store a result value of a first sensing operation. After the bit line precharge operation, a value stored in the storage unit is inverted before the storage unit stores the result value of the first sensing operation.
    Type: Application
    Filed: June 3, 2020
    Publication date: September 17, 2020
    Applicant: SK hynix Inc.
    Inventors: Hee Joung PARK, Kyeong Seung KANG, Won Chul SHIN
  • Patent number: 10706929
    Abstract: Presented herein is a memory device and a method of operating the memory device. The memory device may include a memory cell, and a page buffer coupled to the memory cell via a bit line and configured to perform a read operation on the memory cell. The page buffer may include a storage unit configured to control a bit line precharge operation during the read operation and to store a result value of a first sensing operation. After the bit line precharge operation, a value stored in the storage unit is inverted before the storage unit stores the result value of the first sensing operation.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: July 7, 2020
    Assignee: SK hynix Inc.
    Inventors: Hee Joung Park, Kyeong Seung Kang, Won Chul Shin
  • Publication number: 20200077853
    Abstract: A dust suction device includes: a main body composed of a bottom plate and a footboard, wherein a dust suction part is formed in the bottom plate, and the footboard seals the dust suction part and has suction holes formed on the upper part thereof to allow the dust to be sucked to the dust suction part; a number of springs provided on the bottom inside the bottom plate matching the number of suction holes; balls which are provided on the upper part of the springs and which are in close contact with the suction holes of the footboard and open and close the suction holes; and a suction part which is connected to a side portion of the main body through a hose and sucks the dust through the suction holes toward the dust suction part when the suction holes are open.
    Type: Application
    Filed: April 10, 2018
    Publication date: March 12, 2020
    Inventor: Won Chul SHIN
  • Patent number: 10304544
    Abstract: A memory device includes a plurality of memory cells, bit lines connected to the plurality of memory cells, and page buffers coupled to the plurality of memory cells through the bit lines, and performing a read operation on the plurality of memory cells, wherein each of the page buffers comprises: a first latch controlling a bit line precharge operation during the read operation; and a second latch storing a result of a first sensing operation and a result of a second sensing operation performed after the first sensing operation, wherein a value stored in the second latch is inverted when the result of the first sensing operation and the result of second sensing operation are different from each other during the second sensing operation.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: May 28, 2019
    Assignee: SK hynix Inc.
    Inventors: Hee Joung Park, Kyeong Seung Kang, Won Chul Shin, Dong Hyuk Chae
  • Publication number: 20190043584
    Abstract: Presented herein is a memory device and a method of operating the memory device. The memory device may include a memory cell, and a page buffer coupled to the memory cell via a bit line and configured to perform a read operation on the memory cell. The page buffer may include a storage unit configured to control a bit line precharge operation during the read operation and to store a result value of a first sensing operation. After the bit line precharge operation, a value stored in the storage unit is inverted before the storage unit stores the result value of the first sensing operation.
    Type: Application
    Filed: March 23, 2018
    Publication date: February 7, 2019
    Applicant: SK hynix Inc.
    Inventors: Hee Joung PARK, Kyeong Seung KANG, Won Chul SHIN
  • Publication number: 20180322929
    Abstract: A memory device includes a plurality of memory cells, bit lines connected to the plurality of memory cells, and page buffers coupled to the plurality of memory cells through the bit lines, and performing a read operation on the plurality of memory cells, wherein each of the page buffers comprises: a first latch controlling a bit line precharge operation during the read operation; and a second latch storing a result of a first sensing operation and a result of a second sensing operation performed after the first sensing operation, wherein a value stored in the second latch is inverted when the result of the first sensing operation and the result of second sensing operation are different from each other during the second sensing operation.
    Type: Application
    Filed: December 8, 2017
    Publication date: November 8, 2018
    Inventors: Hee Joung PARK, Kyeong Seung KANG, Won Chul SHIN, Dong Hyuk CHAE