Patents by Inventor Won-gi Chang
Won-gi Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11289430Abstract: A semiconductor package may include a package substrate, a support structure on the package substrate and having a cavity therein, and at least one first semiconductor chip on the package substrate in the cavity. The support structure may have a first inner sidewall facing the cavity, a first top surface, and a first inclined surface connecting the first inner sidewall and the first top surface. The first inclined surface may be inclined with respect to a top surface of the at least one first semiconductor chip.Type: GrantFiled: March 31, 2020Date of Patent: March 29, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Gi Chang, Bok Sik Myung
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Publication number: 20210050309Abstract: A semiconductor package may include a package substrate, a support structure on the package substrate and having a cavity therein, and at least one first semiconductor chip on the package substrate in the cavity. The support structure may have a first inner sidewall facing the cavity, a first top surface, and a first inclined surface connecting the first inner sidewall and the first top surface. The first inclined surface may be inclined with respect to a top surface of the at least one first semiconductor chip.Type: ApplicationFiled: March 31, 2020Publication date: February 18, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Won-Gi CHANG, Bok Sik MYUNG
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Patent number: 10923465Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.Type: GrantFiled: May 21, 2019Date of Patent: February 16, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Won-Gi Chang, Dongwon Lee, Myung-Sung Kang, Hyein Yoo
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Publication number: 20190273075Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.Type: ApplicationFiled: May 21, 2019Publication date: September 5, 2019Inventors: Won-Gi Chang, Dongwon Lee, Myung-Sung Kang, Hyein Yoo
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Patent number: 10354985Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.Type: GrantFiled: February 21, 2017Date of Patent: July 16, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Won-Gi Chang, Dongwon Lee, Myung-Sung Kang, Hyein Yoo
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Patent number: 10115613Abstract: The present disclosure relates to a method of fabricating a semiconductor package. The method may include forming a cavity in a package substrate and providing the package substrate and a die on a carrier tape film. Here, the carrier tape film may include a tape substrate and an insulating layer on the tape substrate, and the die may be provided in the cavity of the package substrate. The method may further include subsequently forming an encapsulation layer to cover the insulating layer and the die in the cavity and cover the package substrate on the insulating layer and removing the tape substrate from the insulating layer.Type: GrantFiled: March 27, 2017Date of Patent: October 30, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Won-Gi Chang, Yeongseok Kim, Hyein Yoo
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Publication number: 20170365591Abstract: A method for manufacturing a semiconductor device includes stacking, on a package substrate, first semiconductor chips. Each of the first semiconductor chips includes a first adhesive film. The method includes stacking, respectively on the first semiconductor chips, second semiconductor chips. Each of the second semiconductor chips includes a second adhesive film. The method includes compressing the first and second adhesive films to form an adhesive structure. The adhesive structure includes an extension disposed on sidewalls of the first and second semiconductor chips. The method includes removing the extension. The method includes forming a first molding layer substantially covering the first and second semiconductor chips. The method includes performing a cutting process on the package substrate between the first and second semiconductor chips to form a plurality of semiconductor packages each including at least one of the first semiconductor chips and at least one of the second semiconductor chips.Type: ApplicationFiled: February 21, 2017Publication date: December 21, 2017Inventors: WON-GI CHANG, DONGWON LEE, MYUNG-SUNG KANG, HYEIN YOO
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Publication number: 20170358535Abstract: Provided are a semiconductor package. The semiconductor package comprises a redistribution substrate, an interconnect substrate on the redistribution substrate and including a hole penetrating therethrough and a recess region in a lower portion thereof, a semiconductor chip on the redistribution substrate and disposed in the hole of the interconnect substrate, and a molding layer covering the semiconductor chip and the interconnect substrate. The recess region is connected to the hole. The mold layer fills the recess region and a gap between the semiconductor chip and the interconnect substrate.Type: ApplicationFiled: June 8, 2017Publication date: December 14, 2017Inventors: Hyein YOO, Won-Gi CHANG
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Publication number: 20170358467Abstract: The present disclosure relates to a method of fabricating a semiconductor package. The method may include forming a cavity in a package substrate and providing the package substrate and a die on a carrier tape film. Here, the carrier tape film may include a tape substrate and an insulating layer on the tape substrate, and the die may be provided in the cavity of the package substrate. The method may further include subsequently forming an encapsulation layer to cover the insulating layer and the die in the cavity and cover the package substrate on the insulating layer and removing the tape substrate from the insulating layer.Type: ApplicationFiled: March 27, 2017Publication date: December 14, 2017Inventors: Won-Gi CHANG, YEONGSEOK KIM, Hyein YOO
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Patent number: 8338962Abstract: A semiconductor package may include a package substrate having a first surface and a boundary that may be defined by edges of the package substrate. The package further includes a first semiconductor chip having a front surface and a back surface. The back surface of a first portion of the first semiconductor chip may be disposed on the first surface of the package substrate with the back surface of a second portion of the first semiconductor chip extending beyond of the defined boundary of the package substrate. The semiconductor package may also include a second semiconductor chip disposed on the back surface of the second portion of the first semiconductor chip that extends beyond the defined boundary of the package substrate.Type: GrantFiled: March 27, 2011Date of Patent: December 25, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Won-gi Chang, Tae-sung Park
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Publication number: 20120038035Abstract: A semiconductor package may include a package substrate having a first surface and a boundary that may be defined by edges of the package substrate. The package further includes a first semiconductor chip having a front surface and a back surface. The back surface of a first portion of the first semiconductor chip may be disposed on the first surface of the package substrate with the back surface of a second portion of the first semiconductor chip extending beyond of the defined boundary of the package substrate. The semiconductor package may also include a second semiconductor chip disposed on the back surface of the second portion of the first semiconductor chip that extends beyond the defined boundary of the package substrate.Type: ApplicationFiled: March 27, 2011Publication date: February 16, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Won-gi Chang, Tae-sung Park