Patents by Inventor Won-Hi Oh

Won-Hi Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device including power-on reset circuit
    Patent number: 8797071
    Abstract: A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: August 5, 2014
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jung-ho Lee, Hyun-soo Bae, Won-hi Oh, Jong-mu Lee
  • SEMICONDUCTOR DEVICE INCLUDING POWER-ON RESET CIRCUIT
    Publication number: 20140021985
    Abstract: A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
    Type: Application
    Filed: September 27, 2013
    Publication date: January 23, 2014
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventors: Jung-ho LEE, Hyun-soo BAE, Won-hi OH, Jong-mu LEE
  • Semiconductor device including power-on reset circuit
    Patent number: 8547144
    Abstract: A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: October 1, 2013
    Assignee: Fairchild Korea Semicondcutor Ltd.
    Inventors: Jung-ho Lee, Hyun-soo Bae, Won-hi Oh, Jong-mu Lee
  • INTERLOCK CIRCUIT AND INTERLOCK SYSTEM INCLUDING THE SAME
    Publication number: 20130015881
    Abstract: An interlock circuit includes an input delay unit and an output suppressing unit. The input delay unit delays a plurality of input signals, provides a plurality of delayed input signals, and provides a plurality of exclusive input signals by performing a logical operation on the plurality of delayed input signals. The output suppressing unit provides a plurality of output signals, which are not simultaneously enabled, based on the plurality of exclusive input signals and the plurality of input signals.
    Type: Application
    Filed: September 20, 2012
    Publication date: January 17, 2013
    Inventors: Jung-Ho LEE, Eun-Chul KANG, Won-Hi OH
  • Interlock circuit and interlock system including the same
    Patent number: 8330490
    Abstract: An interlock circuit includes an input delay unit and an output suppressing unit. The input delay unit delays a plurality of input signals, provides a plurality of delayed input signals, and provides a plurality of exclusive input signals by performing a logical operation on the plurality of delayed input signals. The output suppressing unit provides a plurality of output signals, which are not simultaneously enabled, based on the plurality of exclusive input signals and the plurality of input signals.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: December 11, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jung-ho Lee, Eun-Chul Kang, Won-Hi Oh
  • SEMICONDUCTOR DEVICE INCLUDING POWER-ON RESET CIRCUIT
    Publication number: 20120176167
    Abstract: A semiconductor device including a power-on-reset (POR) circuit. The semiconductor device includes a driving voltage generator configured to generate a first voltage that rises at a first slope and subsequently rises at a second slope greater than the first slope and a first POR signal generator configured to receive the first voltage and generate a first POR signal having a first ramp-up time.
    Type: Application
    Filed: December 13, 2011
    Publication date: July 12, 2012
    Inventors: Jung-ho LEE, Hyun-soo BAE, Won-hi OH, Jong-mu LEE
  • Interlock Circuit And Interlock System Including The Same
    Publication number: 20110316585
    Abstract: An interlock circuit includes an input delay unit and an output suppressing unit. The input delay unit delays a plurality of input signals, provides a plurality of delayed input signals, and provides a plurality of exclusive input signals by performing a logical operation on the plurality of delayed input signals. The output suppressing unit provides a plurality of output signals, which are not simultaneously enabled, based on the plurality of exclusive input signals and the plurality of input signals.
    Type: Application
    Filed: November 8, 2010
    Publication date: December 29, 2011
    Inventors: Jung-Ho LEE, Eun-Chul KANG, Won-Hi OH