Abstract: Methods for forming metal line of semiconductor device wherein via contact plug is formed without the deposition process of Ti/TiN liner layer and conductive layer filling a via contact hole so that the formation processes of a conductive layer for lower metal line and a conductive layer for via contact plug can be performed successively without interruption is disclosed.

Abstract: Methods for forming metal line of semiconductor device wherein via contact plug is formed without the deposition process of Ti/TiN liner layer and conductive layer filling a via contact hole so that the formation processes of a conductive layer for lower metal line and a conductive layer for via contact plug can be performed successively without interruption is disclosed.

Abstract: A method for manufacturing a bit line is disclosed. Such a method includes: forming a layer-insulation layer on the surface of a semiconductor substrate; forming a contact hole on a predetermined region of the layer-insulation layer; forming a first conductive layer on the upper surface of the layer-insulation layer and inside the contact hole, the first conductive layer being made of a metal; forming a second conductive layer on the upper surface of the first conductive layer, the second conductive layer being made of a metal; and patterning the first and the second conductive layers together. The bit line made of a metal is manufactured to be integrated with a plug. The first conductive layer is formed by sputtering while the second conductive layer is formed by chemical vapor deposition, thereby shortening the process and improving the characteristics of the bit line.

Abstract: The present invention provides a method for forming metal wiring in a semiconductor device, which can improve a reliability of multilayered metal wiring. The process includes forming a first insulating structure on a semiconductor substrate, etching the first insulating film to form a first contact hole, forming a first plug in the first contact hole, and removing a portion of the first insulating structure to planarize the first plug and the remaining portion of the first insulating structure. A first wiring layer is formed on a portion of the first insulating film on and around the first plug. A second insulating structure is deposited on the first wiring layer and the first insulating structure and the second insulating structure is etched to create a via hole which exposes the first wiring layer. A second plug is created in the second contact hole and a portion of the second insulating film is removed to planarize the second plug and the remaining portion of the second insulating structure.

Abstract: A method for manufacturing a bit line is disclosed. Such a method includes: forming a layer-insulation layer on the surface of a semiconductor substrate; forming a contact hole on a predetermined region of the layer-insulation layer; forming a first conductive layer on the upper surface of the layer-insulation layer and inside the contact hole, the first conductive layer being made of a metal; forming a second conductive layer on the upper surface of the first conductive layer, the second conductive layer being made of a metal; and patterning the first and the second conductive layers together. The bit line made of a metal is manufactured to be integrated with a plug. The first conductive layer is formed by sputtering while the second conductive layer is formed by chemical vapor deposition, thereby shortening the process and improving the characteristics of the bit line.