Abstract: Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.

Abstract: An apparatus for winding, in the form of a quadrupole, an optical fiber used for forming a sensor coil of a fiber optic gyroscope. A center shaft is supported by a pair of support sections. A cylindrical spool is fitted around the center shaft. A pair of winding disks are arranged adjacent to both ends of the spool so that they can be rotated about the center shaft. A pair of reels are mounted to facing surfaces of the winding disks so that both halves of the optical fiber to be wound on the spool can be wound on the reels, respectively. The winding disks can be rotated at the same velocity in opposite directions. The cylindrical spool is installed to be reciprocated along an axis of the center shaft. The respective reels mounted to the winding disks are spaced apart from each other by a predetermined interval.

Abstract: A method of manufacturing a semiconductor device includes forming an insulation pattern over a substrate. The insulation pattern has at least one opening that exposes a surface of the substrate. Then, a first polysilicon layer is formed over the substrates such that the first polysilicon layer fills the opening. The first polysilicon layer also includes a void therein. An upper portion of the first polysilicon layer is removed such that void expands to a recess and the recess is exposed. A second polysilicon layer is formed over the substrate such that the second polysilicon layer fills the recess.

Abstract: Methods of manufacturing a semiconductor device are provided. A trench is formed in a semiconductor substrate. A first field oxide layer is formed that partially fills the trench. The first field oxide layer defines an active region of the substrate that is adjacent to the trench. An upper portion of sidewalls of the trench extends upward beyond a surface of the first field oxide layer. A first liner is formed on the first field oxide layer and on the portion of the sidewalls of the trench that extend upward beyond the first field oxide layer. A second field oxide layer is formed on the first liner and fills the trench. The second field oxide layer and the first liner are each partially removed to expose a top adjacent surface and upper sidewalls of the trench along the active region of the substrate. A dielectric layer is formed on the exposed top adjacent surface and upper sidewalls of the trench. A gate electrode is formed on the dielectric layer.

Abstract: Methods of forming non-volatile memory devices include the steps of forming a semiconductor substrate having first and second floating gate electrodes thereon and an electrically insulating region extending between the first and second floating gate electrodes. A step is then performed to etch back the electrically insulating region to expose upper corners of the first and second floating gate electrodes. Another etching step is then performed. This etching step includes exposing upper surfaces and the exposed upper corners of the first and second floating gate electrodes to an etchant that rounds the exposed upper corners of the first and second floating gate electrodes. The step of etching back the electrically insulating region includes etching back the electrically insulating region to expose sidewalls of the first and second floating gate electrodes having heights ranging from about 30 ? to about 200 ?.

Abstract: Methods of forming an electronic structure can include forming an interlayer insulating layer on a substrate, and forming a storage node comprising a base and sidewalls extending away from the base. The interlayer insulating layer can have a contact hole therein exposing a portion of the substrate. Moreover, the storage node base can be in the contact hole and the sidewalls can extend away from the base and away from the substrate with portions of the sidewalls being within the contact hole and with portions of the sidewalls extending outside the contact hole beyond the interlayer insulating layer away from the substrate. Related structures are also discussed.

Abstract: Disclosed is a method for forming a multilayer metal thin film capable of improving electromigration reliability. In accordance with an aspect of the present invention, there is provided a method for forming a multilayer metal thin film in a semiconductor device, comprising the steps of: forming a Ti film having an <002> crystal orientation by using an ionized physical vapor deposition method; forming a TiN film on the Ti film in order to form a multilayer stack, wherein the TiN film has an <111> crystal orientation; and forming an aluminum film on the multilayer stack in an <111> crystal orientation. Accordingly, the aluminum metal interconnection according to the present invention increases the <002> orientation of the Ti film and improves the <111> orientation of the aluminum to control the electromigration resistance, by using the IPVD method in forming the Ti film as an underlayer of the aluminum film.

Abstract: Provided is a method of manufacturing a shallow trench isolation (STI) film without voids or added processes. In one embodiment, the method of manufacturing an STI film includes forming a pad oxide pattern film and a silicon nitride film pattern, which define an isolation region, on a semiconductor substrate, and forming a trench by etching the semiconductor substrate to a predetermined depth using the pad oxide film pattern and the silicon nitride film pattern as masks. The resultant semiconductor substrate having the trench may be then dipped in a chemical solution containing ozone to pullback side walls of the silicon nitride film pattern. Afterward, the STI film can be formed by filling the trench with an insulating film.

Abstract: A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. The dielectric layer is etched with a chemical solution such as LAL. Prior to etching, the protruding portion of the electrode is removed or reduced to prevent any bubbles included in the chemical solution from adhering to the electrode. Thus, the chemical solution can etch the dielectric layers without being blocked by any bubbles included in a chemical solution.

Abstract: A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. An etchant or chemical solution is applied to the dielectric layer and bubbles in the etchant are prevented from adhering to the electrode. In one embodiment, prior to etching, the protruding portion is covered with a buffer layer to prevent bubbles in the etchant from adhering to the electrode. Thus, the etchant can etch the dielectric layers without being blocked by bubbles included therein.

Abstract: Provided is a method of fabricating a shallow trench isolation (STI) structure having a high aspect ratio and improved insulating properties. The exemplary method includes filling a shallow trench isolation region opening with an undoped polysilicon layer, removing an upper portion of the undoped polysilicon layer to form a second opening having a reduced aspect ratio relative to the original opening and filling the second opening with an insulating material to complete the STI structure. Additional protective layers including silicon oxide, silicon nitride and/or a capping layer may be provided on the sidewalls of the opening before depositing the undoped polysilicon.

Abstract: A metal thin film of a semiconductor device and method for forming the same is disclosed, in which excellent step coverage and surface roughness are maintained. The metal thin film of a semiconductor device according to the present invention includes: a barrier metal layer formed on a semiconductor substrate; and a PVD seed thin film, a CVD thin film, and a PVD reflow thin film sequentially formed on the barrier metal layer, wherein the PVD seed thin film, the CVD thin film and the PVD reflow thin film are of the same material.

Abstract: A metal thin film of a semiconductor device and method for forming the same is disclosed, in which excellent step coverage and surface roughness are maintained. The metal thin film of a semiconductor device according to the present invention includes: a barrier metal layer formed on a semiconductor substrate; and a PVD seed thin film, a CVD thin film, and a PVD reflow thin sequentially formed on the barrier metal layer, wherein the PVD seed thin film, the CVD thin film and the PVD reflow thin film are of the same material.

Abstract: Methods of forming an electronic structure can include forming an interlayer insulating layer on a substrate, and forming a storage node comprising a base and sidewalls extending away from the base. The interlayer insulating layer can have a contact hole therein exposing a portion of the substrate. Moreover, the storage node base can be in the contact hole and the sidewalls can extend away from the base and away from the substrate with portions of the sidewalls being within the contact hole and with portions of the sidewalls extending outside the contact hole beyond the interlayer insulating layer away from the substrate. Related structures are also discussed.

Abstract: A method for forming a multilayer metal thin film capable of improving electromigration reliability. The method includes steps of forming a Ti film having an <002> crystal orientation by using an ionized physical vapor deposition method, forming a TiN film on the Ti film in order to form a multilayer stack, wherein the TiN film has an <111> crystal orientation, and forming an aluminum film on the multilayer stack in an <111> crystal orientation. Accordingly, the aluminum metal interconnection increases the <002> orientation of the Ti film and improves the <111> orientation of the aluminum to control electromigration resistance, by using the IPVD method in forming the Ti film as an underlayer of the aluminum film.

Abstract: A wafer guide for supporting at least one semiconductor wafer during a cleaning process, includes side panels having a plurality of side fixing grooves on an upper surface thereof for stabilizing the at least one semiconductor wafer and for maintaining a sufficient distance between a surface of the at least one semiconductor wafer and an adjacent surface; a center panel having a plurality of center fixing grooves on the upper surface thereof for supporting the at least one semiconductor wafer, each of the plurality of center fixing grooves having inner walls, wherein a contact line is formed on each of the inner walls of the center fixing grooves, and wherein the center panel is positioned between the pair of side panels; and a pair of fixing plates, one of the pair of fixing plates being fixedly attached at each end of the center panel and the pair of side panels.

Abstract: A method of manufacturing a cylindrical storage node in a semiconductor device, in which loss differences of the cylindrical storage node between the center and the edge of cell areas, caused by an etch-back process of storage node isolation, is minimized, thereby maintaining uniform electrical capacitances over the entire area of a semiconductor wafer.

Abstract: A method of manufacturing a cylindrical storage node in a semiconductor device, in which loss differences of the cylindrical storage node between the center and the edge of cell areas, caused by an etch-back process of storage node isolation, is minimized, thereby maintaining uniform electrical capacitances over the entire area of a semiconductor wafer.

Abstract: A method for forming a multilayer metal thin film capable of improving electromigration reliability. The method includes steps of forming a Ti film having an <002> crystal orientation by using an ionized physical vapor deposition method, forming a TiN film on the Ti film in order to form a multilayer stack, wherein the TiN film has an <111> crystal orientation, and forming an aluminum film on the multilayer stack in an <111> crystal orientation. Accordingly, the aluminum metal interconnection increases the <002> orientation of the Ti film and improves the <111> orientation of the aluminum to control electromigration resistance, by using the IPVD method in forming the Ti film as an underlayer of the aluminum film.

Abstract: A method of forming an interconnection layer in a semiconductor device is provided that improves the mass productivity and the reliability of the interconnection by forming a sidewall spacer on the sidewalls of a trench that is formed in an insulation film having a low dielectric constant. The sidewall spacer maintains the sidewall profile of the trench during subsequent processing steps.