Patents by Inventor Won-Kyung Park
Won-Kyung Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240140280Abstract: A vehicle foldable seat includes a seatback unit fixed to a vehicle body and coupled to a headrest and a seat cushion unit rotatably connected to the seatback unit. The seat cushion unit is fixed by elastic force in a stowing position, is selectively switched to a seating position when fixation thereof is released, and is engaged with the seatback unit to be fixed in the seating position.Type: ApplicationFiled: October 23, 2023Publication date: May 2, 2024Inventors: Jae Hoon CHO, Won Young LEE, Jae Won JO, Hae Dong KWAK, Han Kyung PARK
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Patent number: 11957669Abstract: One aspect of the present disclosure is a pharmaceutical composition which includes (R)—N-[1-(3,5-difluoro-4-methansulfonylamino-phenyl)-ethyl]-3-(2-propyl-6-trifluoromethyl-pyridin-3-yl)-acrylamide as a first component and a cellulosic polymer as a second component, wherein the composition of one aspect of the present disclosure has a formulation characteristic in which crystal formation is delayed for a long time.Type: GrantFiled: August 10, 2018Date of Patent: April 16, 2024Assignee: AMOREPACIFIC CORPORATIONInventors: Joon Ho Choi, Won Kyung Cho, Kwang-Hyun Shin, Byoung Young Woo, Ki-Wha Lee, Min-Soo Kim, Jong Hwa Roh, Mi Young Park, Young-Ho Park, Eun Sil Park, Jae Hong Park
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Patent number: 11335676Abstract: A semiconductor device includes: a test transistor which is formed over a substrate; a test pattern structure which is formed in an upper portion of the substrate to be spaced apart from the test transistor; and a protection transistor which is positioned between the test pattern structure and the test transistor.Type: GrantFiled: November 22, 2019Date of Patent: May 17, 2022Assignee: SK hynix Inc.Inventors: Won-Kyung Park, Seung-Hwan Yoon
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Patent number: 11081147Abstract: A pseudo-cryogenic semiconductor device includes memory cells having a plurality of transistors; and a bulk bias voltage supply circuit configured to provide a bulk bias voltage to be applied to a bulk region of the memory cells. The bulk bias voltage supply circuit includes a first temperature sensing circuit configured to generate a first voltage adjustment signal by sensing a temperature in a range from about 70° K to about 173° K; and a bulk bias voltage selector configured to receive the first voltage adjustment signal, select one of a first bulk bias voltage and a second bulk bias voltage different from the first bulk bias voltage, and output the selected voltage as the bulk bias voltage.Type: GrantFiled: October 8, 2019Date of Patent: August 3, 2021Assignee: SK hynix Inc.Inventor: Won-Kyung Park
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Publication number: 20200203335Abstract: A semiconductor device includes: a test transistor which is formed over a substrate; a test pattern structure which is formed in an upper portion of the substrate to be spaced apart from the test transistor; and a protection transistor which is positioned between the test pattern structure and the test transistor.Type: ApplicationFiled: November 22, 2019Publication date: June 25, 2020Inventors: Won-Kyung PARK, Seung-Hwan YOON
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Publication number: 20200185011Abstract: A pseudo-cryogenic semiconductor device includes memory cells having a plurality of transistors; and a bulk bias voltage supply circuit configured to provide a bulk bias voltage to be applied to a bulk region of the memory cells. The bulk bias voltage supply circuit includes a first temperature sensing circuit configured to generate a first voltage adjustment signal by sensing a temperature in a range from about 70° K to about 173° K; and a bulk bias voltage selector configured to receive the first voltage adjustment signal, select one of a first bulk bias voltage and a second bulk bias voltage different from the first bulk bias voltage, and output the selected voltage as the bulk bias voltage.Type: ApplicationFiled: October 8, 2019Publication date: June 11, 2020Inventor: Won-Kyung PARK
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Patent number: 9595315Abstract: A semiconductor memory device includes a bit line sense amplifier, a first column select gate, and a second column select gate. The bit line sense amplifier senses an electric potential difference between a bit line and a complementary bit line during a sensing operation for memory cells. The first column select gate transfers an electric potential on the bit line to a local sense amplifier based on a column select signal. The second column select gate transfers an electric potential on the complementary bit line to the local sense amplifier based on the column select signal. The first and second column select gates have different current drive abilities to compensate a difference in bit line interconnection resistance.Type: GrantFiled: June 9, 2015Date of Patent: March 14, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Joon Han, Won-Kyung Park, Junhee Lim, Sungho Jang
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Publication number: 20160078919Abstract: A semiconductor memory device includes a bit line sense amplifier, a first column select gate, and a second column select gate. The bit line sense amplifier senses an electric potential difference between a bit line and a complementary bit line during a sensing operation for memory cells. The first column select gate transfers an electric potential on the bit line to a local sense amplifier based on a column select signal. The second column select gate transfers an electric potential on the complementary bit line to the local sense amplifier based on the column select signal. The first and second column select gates have different current drive abilities to compensate a difference in bit line interconnection resistance.Type: ApplicationFiled: June 9, 2015Publication date: March 17, 2016Inventors: Joon HAN, Won-Kyung PARK, Junghee LIM, Sungho JANG
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Patent number: 9269810Abstract: A semiconductor device includes an active region defined on a substrate, a gate electrode disposed on the active region and covering two adjacent corners of the active region, a drain area formed in the active region adjacent to a first side of the gate electrode, and a source area formed in the active region adjacent to a second side of the gate electrode. The first and second sides of the gate electrode are spaced apart from each other, and the first side has a bent shape.Type: GrantFiled: July 28, 2014Date of Patent: February 23, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seung-Uk Han, Won-Kyung Park, Jun-Ho Park, Jun-Hee Lim, Ki-Jae Hur
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Patent number: 9240415Abstract: A semiconductor device is provided. A cell region is disposed in a substrate. The cell region includes a memory cell. A peripheral region is disposed in the substrate. The peripheral region is adjacent to the cell region. The peripheral region has a trench isolation, a first active region and a second active region. The trench isolation is interposed between the first active region and the second active region. A common gate pattern is disposed on the peripheral region. The common gate pattern extends in a first direction and partially overlaps the first active region, the second active region and the trench isolation. A buried conductive pattern is enclosed by the trench isolation. The buried conductive pattern extends in a second direction crossing the first direction. A top surface of the buried conductive pattern is lower than a bottom surface of the common gate pattern.Type: GrantFiled: June 24, 2014Date of Patent: January 19, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Won-Kyung Park, Ki-Jae Hur, Hyeong-Sun Hong, Se-Young Kim, Jun-Hee Lim
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Publication number: 20150171215Abstract: A semiconductor device includes an active region defined on a substrate, a gate electrode disposed on the active region and covering two adjacent corners of the active region, a drain area formed in the active region adjacent to a first side of the gate electrode, and a source area formed in the active region adjacent to a second side of the gate electrode. The first and second sides of the gate electrode are spaced apart from each other, and the first side has a bent shape.Type: ApplicationFiled: July 28, 2014Publication date: June 18, 2015Inventors: Seung-uk HAN, Won-kyung PARK, Jun-ho PARK, Jun-hee LIM, Ki-jae HUR
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Publication number: 20150008530Abstract: A semiconductor device is provided. A cell region is disposed in a substrate. The cell region includes a memory cell. A peripheral region is disposed in the substrate. The peripheral region is adjacent to the cell region. The peripheral region has a trench isolation, a first active region and a second active region. The trench isolation is interposed between the first active region and the second active region. A common gate pattern is disposed on the peripheral region. The common gate pattern extends in a first direction and partially overlaps the first active region, the second active region and the trench isolation. A buried conductive pattern is enclosed by the trench isolation. The buried conductive pattern extends in a second direction crossing the first direction. A top surface of the buried conductive pattern is lower than a bottom surface of the common gate pattern.Type: ApplicationFiled: June 24, 2014Publication date: January 8, 2015Inventors: Won-Kyung Park, Ki-Jae Hur, Hyeong-Sun Hong, Se-Young Kim, Jun-Hee Lim
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Patent number: 8653603Abstract: A semiconductor device includes a substrate including a memory cell region and a peripheral region and a field pattern including an insulating region disposed on a nitride liner in a trench in the substrate adjacent an active region. The field pattern and the active region extend in parallel through the cell and peripheral regions. The device also includes a transistor in the peripheral region including a source/drain region in the active region. The device further includes an insertion pattern including an elongate conductive region disposed in the substrate and extending along a boundary between the field pattern and the active region in the peripheral region. Fabrication methods are also described.Type: GrantFiled: February 16, 2011Date of Patent: February 18, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Kyung Park, Satoru Yamada, Young Jin Choi, Kyo-Suk Chae
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Patent number: 8358535Abstract: A semiconductor device includes a sub word line driver. A first sub word line and a second sub word line transmit an operation signal to a memory cell. A main word line optionally sends the operation signal to the first sub word line and the second sub word line. A switching transistor is disposed between the first sub word line and the second sub word line. A gate of the switching transistor is connected the main word line.Type: GrantFiled: October 25, 2010Date of Patent: January 22, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Kyo-suk Chae, Satoru Yamada, Hyuk-joon Kwon, Won-kyung Park, Hyoung-ho Ko
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Publication number: 20110198700Abstract: A semiconductor device includes a substrate including a memory cell region and a peripheral region and a field pattern including an insulating region disposed on a nitride liner in a trench in the substrate adjacent an active region. The field pattern and the active region extend in parallel through the cell and peripheral regions. The device also includes a transistor in the peripheral region including a source/drain region in the active region. The device further includes an insertion pattern including an elongate conductive region disposed in the substrate and extending along a boundary between the field pattern and the active region in the peripheral region. Fabrication methods are also described.Type: ApplicationFiled: February 16, 2011Publication date: August 18, 2011Inventors: Won-Kyung Park, Satoru Yamada, Young Jin Choi, Kyo-Suk Chae
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Publication number: 20110170344Abstract: A semiconductor device includes a sub word line driver. A first sub word line and a second sub word line transmit an operation signal to a memory cell. A main word line optionally sends the operation signal to the first sub word line and the second sub word line. A switching transistor is disposed between the first sub word line and the second sub word line. A gate of the switching transistor is connected the main word line.Type: ApplicationFiled: October 25, 2010Publication date: July 14, 2011Inventors: KYO-SUK CHAE, Satoru Yamada, Hyuk-joon Kwon, Won-kyung Park, Hyoung-ho Ko
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Patent number: 7111247Abstract: The present invention relates to a device and method for displaying various menus of a microwave oven onto one screen. In the present invention, the various menus can be displayed onto one screen by using a tree structure or window structure. To this end, display control data are stored such that the various menus can be displayed in the form of the tree structure or display window. These display control data are stored in a separately provided storage device. According to the present invention constructed as such, since the user can confirm the various functions of the microwave oven on the same screen at one time, there is an advantage in that trials and errors made when using the microwave oven can be minimized. In addition, since all the functions can be confirmed simultaneously, there are further advantages in that the time required for learning how to use the microwave oven is reduced and function selection can be conveniently made.Type: GrantFiled: May 16, 2002Date of Patent: September 19, 2006Assignee: LG Electronics Inc.Inventors: Kyung-Hwan Choi, Won-Kyung Park
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Publication number: 20060195796Abstract: The present invention relates to a device and method for displaying various menus of a microwave oven onto one screen. In the present invention, the various menus can be displayed onto one screen by using a tree structure or window structure. To this end, display control data are stored such that the various menus can be displayed in the form of the tree structure or display window. These display control data are stored in a separately provided storage device. According to the present invention constructed as such, since the user can confirm the various functions of the microwave oven on the same screen at one time, there is an advantage in that trials and errors made when using the microwave oven can be minimized. In addition, since all, the functions can be confirmed simultaneously, there are further advantages in that the time required for learning how to use the microwave oven is reduced and function selection can be conveniently made.Type: ApplicationFiled: May 2, 2006Publication date: August 31, 2006Inventors: Kyung-Hwan Choi, Won-Kyung Park
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Publication number: 20030001902Abstract: The present invention relates to a device and method for displaying various menus of a microwave oven onto one screen. In the present invention, the various menus can be displayed onto one screen by using a tree structure or window structure. To this end, display control data are stored such that the various menus can be displayed in the form of the tree structure or display window. These display control data are stored in a separately provided storage device. According to the present invention constructed as such, since the user can confirm the various functions of the microwave oven on the same screen at one time, there is an advantage in that trials and errors made when using the microwave oven can be minimized. In addition, since all the functions can be confirmed simultaneously, there are further advantages in that the time required for learning how to use the microwave oven is reduced and function selection can be conveniently made.Type: ApplicationFiled: May 16, 2002Publication date: January 2, 2003Applicant: LG Electronics Inc.Inventors: Kyung-Hwan Choi, Won-Kyung Park
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Patent number: 6133559Abstract: A first highest temperature of a load is detected during a current cycle. A second highest temperature of the load is detected during a last cycle. An actual temperature of the load is estimated in real time based on a gradient between the first and second highest temperatures. The estimated actual temperature and an actual temperature of the load detected by a sensor are compared to each other in real time, and the higher temperature is set as a current temperature. A heating operation is continued until the current temperature reaches a preset temperature.Type: GrantFiled: December 30, 1998Date of Patent: October 17, 2000Assignee: LG Electronics Inc.Inventor: Won Kyung Park