Patents by Inventor Won-Oh SEO

Won-Oh SEO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10797160
    Abstract: A method of fabricating a semiconductor device may include forming a fin structure on a substrate; forming an interface film having a first thickness on the fin structure using a first process; forming a gate dielectric film having a second thickness on the interface film using a second process different from the first process; and densifying the gate dielectric film using a third process different from the first and second processes. The second thickness may be greater than the first thickness, and the first thickness of the interface film may be unchanged after the densifying of the gate dielectric film.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: October 6, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Jun Sim, Won-Oh Seo, Sun-Jung Kim, Ki-Yeon Park
  • Patent number: 10685957
    Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: June 16, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Hyun Choi, Yong-Suk Tak, Gi-Gwan Park, Bon-Young Koo, Ki-Yeon Park, Won-Oh Seo
  • Publication number: 20190237563
    Abstract: A method of fabricating a semiconductor device may include forming a fin structure on a substrate; forming an interface film having a first thickness on the fin structure using a first process; forming a gate dielectric film having a second thickness on the interface film using a second process different from the first process; and densifying the gate dielectric film using a third process different from the first and second processes. The second thickness may be greater than the first thickness, and the first thickness of the interface film may be unchanged after the densifying of the gate dielectric film.
    Type: Application
    Filed: October 2, 2018
    Publication date: August 1, 2019
    Inventors: HYUN-JUN SIM, WON-OH SEO, SUN-JUNG KIM, KI-YEON PARK
  • Publication number: 20180301452
    Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.
    Type: Application
    Filed: June 12, 2018
    Publication date: October 18, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-Hyun Choi, Yong-Suk Tak, Gi-Gwan Park, Bon-Young Koo, Ki-Yeon Park, Won-Oh Seo
  • Patent number: 10026736
    Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgassing prevention pattern sequentially stacked.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: July 17, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Hyun Choi, Yong-Suk Tak, Gi-Gwan Park, Bon-Young Koo, Ki-Yeon Park, Won-Oh Seo
  • Publication number: 20170330905
    Abstract: A pixel array may include an array of microlenses, an array of photodetectors, and an array of color filters. The array of microlenses concentrate incoming light through respective filters in the array of color filters to respective photodetectors in the array of photodetectors. An anti-reflective layer is included between the photodetectors and color filters. The anti-reflective layer includes a first layer having a first index of refraction, a second layer closer to the color filter than the first layer having a second, higher, index of refraction, and a lattice adjusting layer between the first and second layers. The second layer includes a rutile phase TiO2 layer and the lattice adjusting layer includes a crystalline material having a lattice constant similar to that of the rutile phase TiO2 layer.
    Type: Application
    Filed: January 3, 2017
    Publication date: November 16, 2017
    Inventors: Yong Suk Tak, Hong Bum Park, Won Oh Seo, Guk Hyon Yon, Ju Ri Lee
  • Publication number: 20170200718
    Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgassing prevention pattern sequentially stacked.
    Type: Application
    Filed: December 20, 2016
    Publication date: July 13, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sung-Hyun CHOI, Yong-Suk TAK, Gi-Gwan PARK, Bon-Young KOO, Ki-Yeon PARK, Won-Oh SEO