Abstract: The present invention relates to a method and apparatus for performing two dimension fast fourier transform for hologram processing. A method for processing a hologram according to an embodiment of the present disclosure may comprise: generating complex data by multiplying the digital image by a random phase value; performing inverse fast fourier transform (IFFT) processing on the complex data; generating pattern information by multiplying a result of the IFFT processing by a quadrant phase; and processing the hologram based on the pattern information. Here, the IFFT processing may comprise a IFFT core operation that performs row-base IFFT and column-base IFFT on the complex data, and a single shift IFFT operation that applies a predefined rule to a result of one or more of the row-based IFFT or the column-based IFFT.

Abstract: A distributed shared power apparatus of a data center includes a server monitor configured to monitor two or more rack mount servers that generate power by converting incoming alternating current (AC) power into direct current (DC) power and share the generated power with each other, and to collect an available total DC power of each rack mount server and a peak DC power used by each rack mount server; and a sharing controller configured to calculate surplus DC power possessed by each rack based on the collected available total DC power of each rack mount server and the peak DC power used by each rack mount server, and to control power sharing between the two or more rack mount servers based on the calculated surplus DC power of each rack.

Abstract: Provided is a central management computing system. The central management computing system includes a plurality of terminals, and a rack system. The rack system is connected to the plurality of terminals. The rack system includes a rack power supply unit, a plurality of computers, and a switch. The rack power supply unit is mounted in a rack and converts an AC power into a plurality of DC powers to output to a plurality of DC output ports. The plurality of computers are mounted in the rack and receive the DC powers from the DC output ports. The switch is mounted in the rack and dynamically connects the computers to the terminals, respectively.

Abstract: Provided are a DC power supply device and a DC power supply system for supplying multiple DC powers having variable voltages using a power line communication (PLC). The DC power supply device includes an AC/DC converter, a DC/DC distributor, a plurality of output voltage regulators, a voltage control module, and a PLC modem. The AC/DC converter converts an inputted AC voltage into DC voltage, and the DC/DC distributor distributes the DC voltage according to number of external devices. The output voltage regulators output the distributed DC voltage to the external devices. The voltage control module controls the output voltage regulators to output voltages according to the voltage request information of the external devices. The PLC modem transmits/receives the real-time voltage request information of the external devices through a power line.

Abstract: Provided is a method of controlling a rack power supply system and a rack power supply apparatus. The system includes a plurality of computing devices mounted in a rack, and a rack power supply apparatus supplying the plurality of computing devices with direct current (DC) power. The rack power supply apparatus includes a plurality of power generating units and a control unit. The plurality of power generating units are supplied with alternating current (AC) power to generate the DC power. The control unit controls to turn on or off each power generating unit in consideration of power consumption.

Abstract: A method for converting an IBIS (Input/output Buffer Information Specification) model to a SPICE (Simulation Program with Integrated Circuit Emphasis) behavioral model by RC (resistor/capacitor) extraction is provided. In the method, when the SPICE behavioral models of pull-up and pull-down transistors being switching components of the output IBIS model is embodied, a resistance is extracted from voltage-current tables of the pull-up and pull-down transistors and a capacitance is extracted from voltage-time tables of the pull-up and pull-down transistors so that a static characteristic is modeled as a resistor and a dynamic characteristic is modeled as a capacitor.

Abstract: A method for converting an IBIS (Input/output Buffer Information Specification) model to a SPICE (Simulation Program with Integrated Circuit Emphasis) behavioral model by RC (resistor/capacitor) extraction is provided. In the method, when the SPICE behavioral models of pull-up and pull-down transistors being switching components of the output IBIS model is embodied, a resistance is extracted from voltage-current tables of the pull-up and pull-down transistors and a capacitance is extracted from voltage-time tables of the pull-up and pull-down transistors so that a static characteristic is modeled as a resistor and a dynamic characteristic is modeled as a capacitor.