Abstract: Insulated winding wires and associated methods for forming winding wires are described. A winding wire may include a conductor and insulation formed around the conductor. The insulation may provide a partial discharge inception voltage greater than approximately 1,000 volts and a dielectric strength greater than approximately 10,000 volts. Additionally, the insulation may be capable of withstanding a continuous operating temperature of approximately 220° C. without degradation. The insulation may include at least one base layer formed around an outer periphery of the conductor, and an extruded thermoplastic layer formed around the base layer. The extruded layer may include at least one of polyetheretherketone (PEEK) or polyaryletherketone (PAEK).

Abstract: An insulated winding wire may include a conductor and insulation formed around the conductor. The insulation may include a base insulation layer formed around the conductor and having a first dielectric constant (?1). The insulation may further include an extruded thermoplastic layer formed around the base insulation layer and having a second dielectric constant (?2). The extruded thermoplastic layer may include (i) at least one polymer comprising a ketone group and (ii) at least one fluoropolymer. A ratio of the dielectric constant (?2) of the extruded thermoplastic layer to the dielectric constant (?1) of the base layer at 250° C. may be less than or equal to approximately 1.0.

Abstract: Insulated winding wires and dissociated methods for forming winding wires are described. A winding wire may include a conductor and insulation formed around the conductor. The insulation may provide a partial discharge inception voltage greater than approximately 1,000 volts and a dielectric strength greater than approximately 10,000 volts. Additionally, the insulation may be capable of withstanding a continuous operating temperature of approximately 220° C. without degradation. The insulation may include at least one base layer formed around an outer periphery of the conductor, and an extruded thermoplastic layer formed around the base layer. The extruded layer may include at least one of polyetheretherketone (PEEK) or polyaryletherketone (PAEK.).

Abstract: A phase change memory with a heater with sublithographic dimensions may be achieved, in some embodiments, with lower thermal budget. The phase change memory may use a controlled etching process to reduce the lateral dimension of the heater.

Abstract: Insulated winding wires and associated methods for forming winding wires are described. A winding wire may include a conductor and insulation formed around the conductor. The insulation may provide a partial discharge inception voltage greater than approximately 1,000 volts and a dielectric strength greater than approximately 10,000 volts. Additionally, the insulation may be capable of withstanding a continuous operating temperature of approximately 220° C. without degradation. The insulation may include at least one base layer formed around an outer periphery of the conductor, and an extruded thermoplastic layer formed around the base layer. The extruded layer may include at least one of polyetheretherketone (PEEK) or polyaryletherketone (PAEK).

Abstract: An insulated winding wire may include a conductor and insulation formed around the conductor. The insulation may include a base insulation layer formed around the conductor and having a first dielectric constant (?1). The insulation may further include an extruded thermoplastic layer formed around the base insulation layer and having a second dielectric constant (?2). The extruded thermoplastic layer may include (i) at least one polymer comprising a ketone group and (ii) at least one fluoropolymer. A ratio of the dielectric constant (?2) of the extruded thermoplastic layer to the dielectric constant (?1) of the base layer at 250° C. may be less than or equal to approximately 1.0.

Abstract: Insulated winding wires and associated methods for forming winding wires are described. A winding wire may include a conductor and insulation formed around the conductor. The insulation may provide a partial discharge inception voltage greater than approximately 1,000 volts and a dielectric strength greater than approximately 10,000 volts. Additionally, the insulation may be capable of withstanding a continuous operating temperature of approximately 220° C. without degradation. The insulation may include at least one base layer formed around an outer periphery of the conductor, and an extruded thermoplastic layer formed around the base layer. The extruded layer may include at least one of polyetheretherketone (PEEK) or polyaryletherketone (PAEK).

Abstract: A phase change memory with a heater with sublithographic dimensions may be achieved, in some embodiments, with lower thermal budget. The phase change memory may use a controlled etching process to reduce the lateral dimension of the heater.

Abstract: A multilevel phase change memory may be formed of a chalcogenide material formed between a pair of spaced electrodes. The cross-sectional area of the chalcogenide material may decrease as the material extends from one electrode to another. As a result, the current density decreases from one electrode to the other. This means that a higher current is necessary to convert the material that has the largest cross-sectional area. As a result, different current levels may be utilized to convert different amounts of the chalcogenide material to the amorphous or reset state. A distinguishable resistance may be associated with each of those different amounts of amorphous material, providing the opportunity to engineer a number of different current selectable programmable states.

Abstract: A phase change memory may be formed with a sublithographic heater by using a mask with a sidewall spacer to etch an opening in a dielectric layer. The opening then has a sublithographic lateral extent. The resulting via may be filled with a heater material to form a sublithographic heater.

Abstract: A multilevel phase change memory may be formed of a chalcogenide material formed between a pair of spaced electrodes. The cross-sectional area of the chalcogenide material may decrease as the material extends from one electrode to another. As a result, the current density decreases from one electrode to the other. This means that a higher current is necessary to convert the material that has the largest cross-sectional area. As a result, different current levels may be utilized to convert different amounts of the chalcogenide material to the amorphous or reset state. A distinguishable resistance may be associated with each of those different amounts of amorphous material, providing the opportunity to engineer a number of different current selectable programmable states.

Abstract: A multilevel phase change memory may be formed of a chalcogenide material formed between a pair of spaced electrodes. The cross-sectional area of the chalcogenide material may decrease as the material extends from one electrode to another. As a result, the current density decreases from one electrode to the other. This means that a higher current is necessary to convert the material that has the largest cross-sectional area. As a result, different current levels may be utilized to convert different amounts of the chalcogenide material to the amorphous or reset state. A distinguishable resistance may be associated with each of those different amounts of amorphous material, providing the opportunity to engineer a number of different current selectable programmable states.

Abstract: A phase change memory with a heater with sublithographic dimensions may be achieved, in some embodiments, with lower thermal budget. The phase change memory may use a controlled etching process to reduce the lateral dimension of the heater.

Abstract: Briefly, in accordance with one embodiment of the invention, a device, such as a memory cell, includes a dielectric layer and a layer of phase-change material with an adhesion layer between the dielectric layer and the layer of phase-change material.

Abstract: Briefly, in accordance with one embodiment of the invention, a device, such as a memory cell, includes a dielectric layer and a layer of phase-change material with an adhesion layer between the dielectric layer and the layer of phase-change material.

Abstract: The invention relates to a damascene chalcogenide memory cell structure. The damascene chalcogenide memory cell structure is fabricated under conditions that simplify previous process flows. The damascene chalcogenide memory cell structure also prevents volatilization of the chalcogenide memory material.

Abstract: A switching system is provided to enable selective access from a work center W to any of a plurality of computers PC1-PC16. Connections are provided from .the work center W including a video monitor, a keyboard and a mouse through a selector S proximate the work center W and a single cable bus CB extending in parallel to a plurality of controllers C1-C4 proximate individual computers. The selector S associates a specific computer with identification signals that are provided through the cable bus CB to the controllers C1-C4 to selectively link the identified computer through one of the controllers C1-C4 and the selector S to the work center W. The selector S incorporates a display to identify the selected computer and a manual switch for computer selection. Signal adjustment, reset and autobooting capabilities are provided in the system.