Abstract: A semiconductor memory device includes a first substrate including a first region and a second region, a stacked structure only on the first region of the first substrate among the first region and the second region of the first substrate, the stacked structure including word lines, an interlayer insulating film covering the stacked structure, a dummy conductive structure inside the interlayer insulating film, the dummy conductive structure extending through the stacked structure to contact the first substrate, and a plate contact plug inside the interlayer insulating film, the plate contact plug being connected to the second region of the first substrate, and a height of an upper surface of the dummy conductive structure being greater than a height of an upper surface of the plate contact plug relative to an upper surface of the first substrate.

Abstract: The present invention relates to a switch control circuit that controls a switching operation of a power switch circuit that includes cascode-coupled first and second transistors. A switch control circuit includes a first zener diode coupled between a gate of the first transistor and a first end of a capacitor supplying a power voltage and a second zener diode coupled to a gate and a source of the first transistor, and a first resistor coupled between the first zener diode and the second zener diode.

Abstract: The present invention relates to a switch control circuit that controls a switching operation of a power switch circuit that includes cascode-coupled first and second transistors. A switch control circuit includes a first zener diode coupled between a gate of the first transistor and a first end of a capacitor supplying a power voltage and a second zener diode coupled to a gate and a source of the first transistor, and a first resistor coupled between the first zener diode and the second zener diode.