Abstract: Disclosed is a method for pre-detecting a defective porous polymer substrate for a separator, including selecting a porous polymer substrate having a plurality of pores; observing the selected porous polymer substrate with a scanning electron microscope (SEM) to obtain an image of the porous polymer substrate; quantifying the average value of pore distribution index (PDI); correcting the quantified average value of pore distribution index to obtain the corrected average value of pore distribution index; determining whether or not the corrected average value of pore distribution index is 60 a.u. (arbitrary unit) or less; and classifying the porous polymer substrate as a good product, when the corrected average value of pore distribution index is determined to be 60 a.u. or less, and classifying the porous polymer substrate as a defective product, when the corrected average value of pore distribution index is determined to be larger than 60 a.u.

Abstract: A filter for controlling a pH of purified water is disclosed. The pH-controlling filter according to an aspect of the present disclosure may include a water permeable filter having a hollow formed in a center of a cross-section from one end to the other end; a lower stopper closing a lower end of the water permeable filter, a filling unit inserted into the hollow of the water permeable filter to form an inner space, the filling unit having an inlet through which the purified water passing through the water permeable filter flows into the inner space and an outlet through which the purified water passing through the inner space flows out; and control particles filled in the inner space of the filling unit to adjust a pH of the purified water passing through the inner space of the filling unit and comprising OH group-generating particles configured to supplement the purified water passing through the inner space with OH groups.

Abstract: A display driving device including: a gate driver configured to provide a first gate selection signal to a first gate line of a display panel to select the first gate line; a source driver configured to provide an image signal corresponding to the first gate line to a source line; an Electrostatic Discharge (ESD) detection circuit configured to receive a power supply voltage, determine whether there is an ESD in the power supply voltage and, when the ESD is detected, generate a first detection signal; and a controller configured to receive the first detection signal to generate a masking signal, wherein the gate driver is configured to receive the masking signal and not provide a second gate selection signal to select a second gate line.

Abstract: A display driving device including: a gate driver configured to provide a first gate selection signal to a first gate line of a display panel to select the first gate line; a source driver configured to provide an image signal corresponding to the first gate line to a source line; an Electrostatic Discharge (ESD) detection circuit configured to receive a power supply voltage, determine whether there is an ESD in the power supply voltage and, when the ESD is detected, generate a first detection signal; and a controller configured to receive the first detection signal to generate a masking signal, wherein the gate driver is configured to receive the masking signal and not provide a second gate selection signal to select a second gate line.

Abstract: Methods of operating a display driver integrated circuit (IC) are provided. A method of operating a display driver IC may include generating a first clock signal, and calculating a frequency of the first clock signal using a second clock signal. Moreover, the method may include generating an adjustment signal using the frequency of the first clock signal and a target frequency, and adjusting the frequency of the first clock signal using the adjustment signal. Related display driver ICs and portable electronic devices are also provided.

Abstract: A display driver integrated circuit (IC) (DDI) includes a graphic memory that receives and stores line data including a plurality of pixel data blocks, an indicator generating circuit that compares the pixel data blocks of the line data received by the graphic memory with each other and generates an indicator signal corresponding to results of the comparison, and a read controller that performs a read operation with respect to the whole or a part of the line data from the graphic memory, based on a read command for the line data and the indicator signal.

Abstract: An image driving device includes a determining unit, and image processing unit, and a memory. The determining unit determines whether an input image is a moving image or a still image, and may be synchronized with an internal clock different from an external clock. The image processing unit may image-process at least one frame but less than all frames of the input image when the input image is determined to be a still image. The image processing unit may output the at least one image-processed frame as first image data, and the memory may store the first image data.

Abstract: A method of operating a display driver IC (DDI) includes comparing previous line data with current line data and the R, G, and B components of a color data signals, and controlling whether to activate part of an intermediate processing circuit to process the current line data or more than a single component of the color data signal according to a comparison result.

Abstract: A display driving device includes a first source amplifier that receives first display data and supplies a first pixel voltage to a first pixel based on the received first display data, and a second source amplifier that receives second display data and first control data and supplies a second pixel voltage to a second pixel based on the received second display data and first control data. The second source amplifier has a first stage in which a first process is performed on an input signal based on the second display data, and a second stage in which a second process is performed on the first processed input signal to output the second pixel voltage. The first source amplifier may be configured to conditionally supply the first pixel voltage to the second pixel.

Abstract: Provided are an output buffer circuit having an amplifier offset compensation function and a source driving circuit including the output buffer circuit. The output buffer circuit may include a plurality of channel amplifiers, each of which is configured to adjust an amount of current flowing through transistors connected to at least one of a non-inverted input terminal and an inverted input terminal of a differential input unit to compensate an amplifier offset, and adjust buffer input voltage signals to generate output voltage signals.

Abstract: A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

Abstract: Methods of operating a display driver integrated circuit (IC) are provided. A method of operating a display driver IC may include generating a first clock signal, and calculating a frequency of the first clock signal using a second clock signal. Moreover, the method may include generating an adjustment signal using the frequency of the first clock signal and a target frequency, and adjusting the frequency of the first clock signal using the adjustment signal. Related display driver ICs and portable electronic devices are also provided.

Abstract: Methods of operating a display driver integrated circuit (IC) are provided. A method of operating a display driver IC may include generating a first clock signal, and calculating a frequency of the first clock signal using a second clock signal. Moreover, the method may include generating an adjustment signal using the frequency of the first clock signal and a target frequency, and adjusting the frequency of the first clock signal using the adjustment signal. Related display driver ICs and portable electronic devices are also provided.

Abstract: A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

Abstract: A voltage generator includes a boosting circuit boosting a power voltage to generate first through fourth voltages, and a boosting controller controlling the boosting circuit. The boosting controller sets the third and fourth voltages to a voltage level lower than that of a ground voltage while the first and second voltages are generated, so that a plurality of voltages may be stably generated, i.e., without latch-up.

Abstract: Provided are an output buffer circuit having an amplifier offset compensation function and a source driving circuit including the output buffer circuit. The output butler circuit may include a plurality of channel amplifiers, each of which is configured to adjust an amount of current flowing through transistors connected to at least one of a non-inverted input terminal and an inverted input terminal of a differential input unit to compensate an amplifier offset, and adjust buffer input voltage signals to generate output voltage signals.

Abstract: A display driver integrated circuit (IC) (DDI) includes a graphic memory that receives and stores line data including a plurality of pixel data blocks, an indicator generating circuit that compares the pixel data blocks of the line data received by the graphic memory with each other and generates an indicator signal corresponding to results of the comparison, and a read controller that performs a read operation with respect to the whole or a part of the line data from the graphic memory, based on a read command for the line data and the indicator signal.

Abstract: An image driving device includes a determining unit, and image processing unit, and a memory. The determining unit determines whether an input image is a moving image or a still image, and may be synchronized with an internal clock different from an external clock. The image processing unit may image-process at least one frame but less than all frames of the input image when the input image is determined to be a still image. The image processing unit may output the at least one image-processed frame as first image data, and the memory may store the first image data.

Abstract: A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.

Abstract: A display device includes a timing controller to generate a plurality of data control signals, a source driving unit to receive the plurality of data control signals from the timing controller and generate a data voltage, and a display panel to receive the data voltage and output an image, wherein the source driving unit transmits the data voltage to the display panel, through a plurality of data lines, with delays that are respectively different corresponding each frame.