Patents by Inventor Won-Sik Shin

Won-Sik Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072140
    Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Won Hyuk Lee, Jong Chul Park, Sang Duk Park, Hong Sik Shin, Do Haing Lee
  • Patent number: 8124978
    Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: February 28, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Young Kim, Rak-Hwan Kim, Young-Joo Cho, Won-sik Shin
  • Publication number: 20100188795
    Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.
    Type: Application
    Filed: March 12, 2010
    Publication date: July 29, 2010
    Inventors: Hyun-Young Kim, Rak-Hwan Kim, Young-Joo Cho, Won-sik Shin
  • Patent number: 7709342
    Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Young Kim, Rak-Hwan Kim, Young-Joo Cho, Won-sik Shin
  • Patent number: 7579237
    Abstract: A method of manufacturing a nonvolatile memory device includes forming a plurality of device isolation regions in a semiconductor substrate, forming a tunneling insulation layer on the semiconductor substrate, forming a first preliminary polysilicon layer in communication with the tunneling insulation layer and the device isolation regions, forming a preliminary amorphous silicon layer on the first preliminary silicon layer, forming a second preliminary polysilicon layer on the preliminary amorphous silicon layer, and patterning the second preliminary polysilicon layer, the preliminary amorphous silicon layer, and the first preliminary polysilicon layer to form a floating gate layer.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: August 25, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Kyoung Lee, Jin-Hong Kim, Dong-Hwan Kim, Won-Sik Shin, Woong Lee
  • Publication number: 20080090352
    Abstract: A method of manufacturing a nonvolatile memory device includes forming a plurality of device isolation regions in a semiconductor substrate, forming a tunneling insulation layer on the semiconductor substrate, forming a first preliminary polysilicon layer in communication with the tunneling insulation layer and the device isolation regions, forming a preliminary amorphous silicon layer on the first preliminary silicon layer, forming a second preliminary polysilicon layer on the preliminary amorphous silicon layer, and patterning the second preliminary polysilicon layer, the preliminary amorphous silicon layer, and the first preliminary polysilicon layer to form a floating gate layer.
    Type: Application
    Filed: January 16, 2007
    Publication date: April 17, 2008
    Inventors: Sang-Kyoung Lee, Jin-Hong Kim, Dong-Hwan Kim, Won-Sik Shin, Woong Lee
  • Patent number: 7153750
    Abstract: A capacitor of a semiconductor device includes a cylinder type capacitor lower electrode, a dielectric layer, and an upper electrode. The upper electrode includes a metallic layer on the dielectric layer and a doped polySi1-xGex layer stacked on the metallic layer. Methods of forming these capacitors also are provided.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: December 26, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-ae Chung, Ki-hyun Hwang, Jung-hwan Oh, Hyo-jung Kim, Seok-woo Nam, Won-sik Shin, U-in Chung, Young-sun Kim, Hee-seok Kim, Beom-jun Jin
  • Patent number: 7119029
    Abstract: In a method of forming an oxide layer, ozone is generated by reacting an oxygen gas having a first flow rate with a nitrogen gas having a second flow rate of more than about 1% of the first flow rate. A reactant including the ozone and nitrogen is provided onto a silicon substrate. A surface of the silicon substrate is oxidized via the reaction of the reactant with silicon in the silicon substrate. The flow rate of the nitrogen gas is increased while ozone serving as an oxidant is formed by reacting the nitrogen gas with the oxygen gas. Thus, the oxide layer or a metal oxide layer including nitrogen may be rapidly formed on the substrate.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: October 10, 2006
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Won-Sik Shin, Ki-Hyun Hwang, Jung-Hwan Oh, Hyeon-Deok Lee, Seok-Woo Nam
  • Publication number: 20060086952
    Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.
    Type: Application
    Filed: October 21, 2005
    Publication date: April 27, 2006
    Inventors: Hyun-Young Kim, Rak-Hwan Kim, Young-Joo Cho, Won-sik Shin
  • Publication number: 20050127036
    Abstract: A method of cleaning a reaction chamber is provided. In the method, a wafer is removed from the reaction chamber, and a nitrogen triflouride (NF3) gas or NF3 plasma is implanted into the reaction chamber. The NF3 gas or NF3 plasma reacts with a phosphorous polymer located in the reaction chamber, and the phosphorus polymer is removed from the reaction chamber.
    Type: Application
    Filed: November 16, 2004
    Publication date: June 16, 2005
    Inventors: Young-Jin Kim, Jin-Kuk Kim, Won-Sik Shin, Byung-Ho Ahn, Jae-Chul Lee, Ki-Hyun Hwang
  • Publication number: 20040259308
    Abstract: A capacitor of a semiconductor device includes a cylinder type capacitor lower electrode, a dielectric layer, and an upper electrode. The upper electrode includes a metallic layer on the dielectric layer and a doped polySi1-xGex layer stacked on the metallic layer. Methods of forming these capacitors also are provided.
    Type: Application
    Filed: April 13, 2004
    Publication date: December 23, 2004
    Inventors: Eun-ae Chung, Ki-hyun Hwang, Jung-hwan Oh, Hyo-jung Kim, Seok-woo Nam, Won-sik Shin, U-in Chung, Young-sun Kim, Hee-seok Kim, Beom-jun Jin
  • Publication number: 20040224532
    Abstract: In a method of forming an oxide layer, ozone is generated by reacting an oxygen gas having a first flow rate with a nitrogen gas having a second flow rate of more than about 1% of the first flow rate. A reactant including the ozone and nitrogen is provided onto a silicon substrate. A surface of the silicon substrate is oxidized via the reaction of the reactant with silicon in the silicon substrate. The flow rate of the nitrogen gas is increased while ozone serving as an oxidant is formed by reacting the nitrogen gas with the oxygen gas. Thus, the oxide layer or a metal oxide layer including nitrogen may be rapidly formed on the substrate.
    Type: Application
    Filed: May 5, 2004
    Publication date: November 11, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Won-Sik Shin, Ki-Hyun Hwang, Jung-Hwan Oh, Hyeon-Deok Lee, Seok-Woo Nam