Patents by Inventor Won-Taek Choi

Won-Taek Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150259800
    Abstract: The present disclosures described herein pertain generally to a method and an apparatus for preparing a graphene by using near-infrared light.
    Type: Application
    Filed: February 17, 2015
    Publication date: September 17, 2015
    Inventors: Byung Hee Hong, Jung Hee Han, Dong Hoon Han, Won Taek Choi, Je Deok Kim
  • Patent number: 5858860
    Abstract: Isolated semiconductor devices are formed by forming field oxide regions in a face of a semiconductor substrate to define active regions therebetween. The field oxide regions extend to above the substrate face and include an oblique surface which extends from above the substrate face to the substrate face. A step reducing region is formed on a respective one of the oblique surfaces of the field oxide regions, extending onto the active regions at the substrate face. The step reducing region can reduce the steepness of the step between the substrate face and the field oxide regions, thereby facilitating further processing and reliability of the semiconductor devices.
    Type: Grant
    Filed: February 6, 1997
    Date of Patent: January 12, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoung-seob Shim, Won-taek Choi, Yun-seung Shin
  • Patent number: 5786265
    Abstract: Methods of forming semiconductor devices containing field oxide and channel-stop isolation regions therein include the steps of forming a plurality of first channel-stop isolation regions by implanting first conductivity type impurities at a first dose level into a face of a semiconductor substrate and then forming respective field oxide isolation regions at the locations where the first channel-stop isolation regions have been implanted. A conductive layer, which contacts active regions of the substrate and covers the field oxide isolation regions, is then patterned over the field oxide isolation regions to expose central portions of the upper surfaces of the field oxide isolation regions.
    Type: Grant
    Filed: May 9, 1996
    Date of Patent: July 28, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-wk Hwang, Hung-mo Yang, Jae-ho Kim, Won-taek Choi, Won-cheol Hong
  • Patent number: 5687810
    Abstract: A power assistance steering system for use in a vehicle comprises a restricting mechanism including a cylindrical reaction piston having a reaction surface on which said reaction pressure is applied in order to cause said reaction piston to be biased downwardly, and at least one reversed V-shaped depression formed on a bottom skirt, the cylindrical reaction piston adapted to be held on the input shaft in such a way that said reaction piston can longitudinally and slidably reciprocate with respect to the input shaft, while circumferentially locked to the input shaft, and at least one semi-spherical protrusion formed on a middle end surface of said output shaft so as to be retained within the reversed V-shaped depression.
    Type: Grant
    Filed: October 26, 1995
    Date of Patent: November 18, 1997
    Assignee: Mando Machinery Corporation
    Inventors: Byoung-Yoon Choi, Won-Taek Choi, Je-Tae Yoo
  • Patent number: 5073510
    Abstract: According to the present invention, the incomplete silicon exposure is prevented by the sufficient overetching after the formation of an etching-stop layer on an oxide layer for protecting a conductive layer from the damage of the protective oxide layer when the self-aligned contact window is formed. Therefore, the thickness of the protective oxide layer can be minimized, and the bend of the chip can be improved whereby the following process will be accomplished easily.
    Type: Grant
    Filed: October 23, 1990
    Date of Patent: December 17, 1991
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Oh-Hyun Kwon, Taek-Yong Jang, Jung-Hyun Shin, Won-Taek Choi
  • Patent number: 5005103
    Abstract: A method of manufacturing folded capacitors comprises the steps of: forming a first storage electrode and a first insulating layer; forming a first plate electrode and a second insulating layer thereon and forming a pad poly thereon; limiting the first plate electrode to a predetermined portion; leaving a spacer; forming a second storage electrode; and depositing a third insulating layer and a second plate electrode thereon. It is possible to manufacture a capacitor with a large capacitance and to simplify the manufacturing processes of the capacitor by using the conventional capacitor manufacturing processes. The folded capacitors with a larger capacitance per unit area can be obtained without making the insulating layer be thinned even if the plane area of the capacitor may be reduced remarkably according to a tendency to high integration density.
    Type: Grant
    Filed: June 5, 1990
    Date of Patent: April 2, 1991
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Oh-Hyun Kwon, Taek-Yong Jang, Jung-Hyun Shin, Won-Taek Choi