Abstract: Disclosed is an apparatus and method for controlling step charging of a secondary battery. A charging control unit determines a SOC, an OCV and a polarization voltage of the secondary battery, determines an OCV deviation corresponding to a difference between the OCV and a predefined minimum OCV value, determines a correction factor corresponding to the polarization voltage and the OCV deviation, determines a look-up SOC by correcting the SOC according to the correction factor, determines the magnitude of a charging current corresponding to the look-up SOC, and provides the determined charging current to a charging device.

Abstract: A capacitor component includes a body, including a dielectric layer and an internal electrode layer, and an external electrode disposed on the body and connected to the internal electrode layer. At least one hole is formed in the internal electrode layer, and a region, containing at least one selected from the group consisting of indium (In) and tin (Sn), is disposed in the hole. A method of manufacturing a capacitor component includes forming a dielectric green sheet, forming a conductive thin film, including a first conductive material and a second conductive material, on the dielectric green sheet, and sintering the conductive thin film to form an internal electrode layer. The internal electrode layer includes the first conductive material, and a region, including the second conductive material, is formed in the internal electrode layer.

Abstract: A pixel may include a first sub-pixel, a third sub-pixel, and a second sub-pixel arranged in a second direction, and each including an emission area and a non-emission area. Each of the first sub-pixel, the second sub-pixel, and the third sub-pixel may include a pixel circuit including at least one transistor and a storage capacitor, a first alignment electrode disposed on the pixel circuit, a second alignment electrode extending spaced apart from the first alignment electrode, a light emitting element disposed between the second alignment electrode and the first alignment electrode, and including a first end adjacent to the second alignment electrode and a second end adjacent to the first alignment electrode, and a bridge pattern spaced apart from the first alignment electrode and the second alignment electrode, and electrically connected to the storage capacitor.

Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

Abstract: A charging control apparatus measures a first temperature of a first secondary battery selected from the plurality of secondary batteries, a second temperature of a coolant flowing into the cooling device, a charging current of the secondary battery pack, a first terminal voltage of the first secondary battery and a second terminal voltage of a second secondary battery closest to the cooling device, estimates a temperature of a temperature estimation point of the second secondary battery from a lumped thermal model having a thermal resistance between two points selected from the temperature estimation point of the second secondary battery, the first temperature measurement point and the second temperature measurement point, and measurement data about temperature, current and voltage, and determines the estimated temperature as a minimum temperature of the secondary battery pack, and varies a charging power provided to the secondary battery pack according to the minimum temperature.

Abstract: A refrigerant cycle pressure control system includes: a heat exchanger cooling boil-off gas received from a storage tank; a refrigerant cycle including a refrigerant circulation line, a refrigerant compressor, and an expander; an inventory tank storing the refrigerant to be charged to the refrigerant cycle; a refrigerant supply line connecting the inventory tank to an upstream side of the refrigerant compressor to replenish the refrigerant cycle with the refrigerant; a refrigerant discharge line connecting a downstream side of the refrigerant compressor to the inventory tank to discharge the refrigerant from the refrigerant cycle to the inventory tank; and a pressure regulation line branched off of the refrigerant discharge line. The refrigerant cycle is depressurized by discharging the refrigerant from the refrigerant cycle through the refrigerant discharge line or the pressure regulation line.

Abstract: A semiconductor device includes, first and second source/drain patterns on an active pattern and spaced apart from each other, a first source/drain contact on the first source/drain pattern and including a first source/drain barrier film and a first source/drain filling film on the first source/drain barrier film, a second source/drain contact on the second source/drain pattern, and a gate structure on the active pattern between the first and second source/drain contacts and including a gate electrode, wherein a top surface of the first source/drain contact is lower than a top surface of the gate structure, and a height from a top surface of the active pattern to a top surface of the first source/drain barrier film is less than a height from the top surface of the active pattern to a top surface of the first source/drain filling film.

Abstract: A storage system includes a storage device and an overlap checker. The overlap checker receives I/O commands of the storage device, extracts characteristics of the received I/O commands, issues a first merge command including N first I/O commands among the I/O commands in response to the extracted characteristics, wherein ‘N’ is a natural number greater than 1. And each of the first I/O commands instructs operation on a position corresponding to an offset in a region of the storage device corresponding to a logical address, wherein the characteristics of the I/O commands include the logical address and the offset.

Abstract: A semiconductor memory device may include a substrate including a cell region and a peripheral region defined around the cell region, and a gate structure which may include sequentially stacked first, second, and third conductive layers including different materials, the first conductive layer including polysilicon. A capping layer may be on the third conductive layer, and a spacer may be on a sidewall of each of the first to third conductive layers and the capping layer. A first contact may extend through the capping layer and into the third conductive layer, with the first contact in contact with the second conductive layer, and separated from the first conductive layer. The first contact may include a first portion in the third conductive layer and a second portion in the capping layer. A width of the first portion may be greater than a width of the second portion in a horizontal direction.

Abstract: The present invention relates to a laparoscopic stapler for suturing body tissue cut during laparoscopic surgery, and more particularly, to a laparoscopic stapler in which implant binding pins to be continuously fired can be correctly positioned using an implant alignment unit for aligning an implant assembly, and an implant assembly pressing member. Therefore, malfunctioning is prevented, and implant loading, transport, and discharge can proceed smoothly.

Abstract: A storage system includes a storage device and an overlap checker. The overlap checker receives I/O commands of the storage device, extracts characteristics of the received I/O commands, issues a first merge command including N first I/O commands among the I/O commands in response to the extracted characteristics, wherein ‘N’ is a natural number greater than 1. And each of the first I/O commands instructs operation on a position corresponding to an offset in a region of the storage device corresponding to a logical address, wherein the characteristics of the I/O commands include the logical address and the offset.

Abstract: Provided is a polarizing plate and a display device. The polarizing plate has excellent durability against an external environment, for example, moisture, due to a protective film of a polarizer, and can prevent color distortion upon observation with polarized sunglasses, and a display device comprising the polarizing plate.

Abstract: A curved display device may include a display panel and a chassis member. The display panel may include a first edge and a second edge. The first edge may be longer than the second edge and may be convex in a back direction. The second edge may be convex in an image-displaying direction. The back direction and the image-displaying direction may be with reference to the display panel. The chassis member may be coupled to the display panel and may support the display panel.

Abstract: Provided is a liquid crystal display comprising: a liquid crystal cell; an upper polarizing plate provided on one surface of the liquid crystal cell and including a first polarizer and a low moisture-permeable film disposed on one surface of the first polarizer so as to face the liquid crystal cell; and a lower polarizing plate provided on the other surface of the liquid crystal cell and including a second polarizer, wherein a ratio of a shrinkage force in a direction parallel to the absorption axis of the second polarizer of the low moisture-permeable film to a shrinkage force in an absorption-axial direction of the second polarizer is 30% or more.

Abstract: A display device includes a backlight unit and a display panel. The backlight unit includes a bottom chassis that includes a fixing surface curved to have a shape that corresponds to a graph of a sine function, a light guide member that includes a light exit surface curved to have a shape that corresponds to the fixing surface, and a light source that provides light to the light guide member. The display panel includes a display surface curved to have a shape that corresponds to the light exit surface.

Abstract: A curved display device may include a display panel and a chassis member. The display panel may include a first edge and a second edge. The first edge may be longer than the second edge and may be convex in a back direction. The second edge may be convex in an image-displaying direction. The back direction and the image-displaying direction may be with reference to the display panel. The chassis member may be coupled to the display panel and may support the display panel.

Abstract: Provided is a liquid crystal display comprising: a liquid crystal cell; an upper polarizing plate provided on one surface of the liquid crystal cell and including a first polarizer and a low moisture-permeable film disposed on one surface of the first polarizer so as to face the liquid crystal cell; and a lower polarizing plate provided on the other surface of the liquid crystal cell and including a second polarizer, wherein a ratio of a shrinkage force in a direction parallel to the absorption axis of the second polarizer of the low moisture-permeable film to a shrinkage force in an absorption-axial direction of the second polarizer is 30% or more.

Abstract: The present application relates to a device for testing optical properties and a method for testing optical properties using the same. The device of the present application has inexpensive manufacturing and maintenance costs, is capable of testing a wide range of plane directional phase differences, and provides the method for testing optical properties with improved identification efficiency of the phase retardation axis.

Abstract: Provided is a polarizing plate and a display device. The polarizing plate has excellent durability against an external environment, for example, moisture, due to a protective film of a polarizer, and can prevent color distortion upon observation with polarized sunglasses, and a display device comprising the polarizing plate.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate which includes a cell region including first and second regions, and a peri region more adjacent to the second region than adjacent to the first region, first and second lower electrodes disposed in the first and second regions, respectively, first and second lower support patterns disposed on outer walls of the first and second lower electrodes, respectively, an upper support pattern disposed on outer walls of the first and second lower electrodes, and being on and spaced apart from the first and second lower support patterns, a dielectric layer disposed on surfaces of the first and second lower electrodes, the first and second lower support patterns, and the upper support pattern, and an upper electrode disposed on a surface of the dielectric layer, wherein thickness of the first lower support pattern is smaller than thickness of the second lower support pattern.