Patents by Inventor Won-Chul Lim

Won-Chul Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9252055
    Abstract: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure, to a second side of the wafer so that a laser-scribed layer of the wafer operates as a division starting point. Accordingly, the wafer dicing press reduces laser radiation and pressure-application times for dividing a wafer into semiconductor devices. This increased efficiency is achieved without increasing the likelihood of damaging the wafer.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: February 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-chul Lim
  • Publication number: 20150140783
    Abstract: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure, to a second side of the wafer so that a laser-scribed layer of the wafer operates as a division starting point. Accordingly, the wafer dicing press reduces laser radiation and pressure-application times for dividing a wafer into semiconductor devices. This increased efficiency is achieved without increasing the likelihood of damaging the wafer.
    Type: Application
    Filed: October 9, 2014
    Publication date: May 21, 2015
    Inventor: Won-chul Lim
  • Patent number: 8870047
    Abstract: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure, to a second side of the wafer so that a laser-scribed layer of the wafer operates as a division starting point. Accordingly, the wafer dicing press reduces laser radiation and pressure-application times for dividing a wafer into semiconductor devices. This increased efficiency is achieved without increasing the likelihood of damaging the wafer.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-chul Lim
  • Patent number: 8431442
    Abstract: A method of manufacturing semiconductor chips includes providing a semiconductor substrate including circuit regions, irradiating the semiconductor substrate with a laser beam onto to form a frangible layer, and polishing the semiconductor substrate to separate the circuit regions of the semiconductor substrate from one another into semiconductor chips. The frangible layer may be removed completely during the polishing of the semiconductor substrate.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: April 30, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Wook Park, Tae Gyeong Chung, Ho Geon Song, Won Chul Lim
  • Publication number: 20120196426
    Abstract: In a wafer dicing press for reducing time and cost for wafer dicing and for evenly applying a dicing pressure to a whole wafer, a wafer dicing press includes a support unit supporting a first side of a wafer; and a pressurization device applying a pressure, by dispersing the pressure, to a second side of the wafer so that a laser-scribed layer of the wafer operates as a division starting point. Accordingly, the wafer dicing press reduces laser radiation and pressure-application times for dividing a wafer into semiconductor devices. This increased efficiency is achieved without increasing the likelihood of damaging the wafer.
    Type: Application
    Filed: December 23, 2011
    Publication date: August 2, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Won-chul Lim
  • Publication number: 20120115307
    Abstract: A method of manufacturing semiconductor chips includes providing a semiconductor substrate including circuit regions, irradiating the semiconductor substrate with a laser beam onto to form a frangible layer, and polishing the semiconductor substrate to separate the circuit regions of the semiconductor substrate from one another into semiconductor chips. The frangible layer may be removed completely during the polishing of the semiconductor substrate.
    Type: Application
    Filed: October 5, 2011
    Publication date: May 10, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Wook Park, Tae Gyeong Chung, Ho Geon Song, Won Chul Lim
  • Patent number: 8159831
    Abstract: A PCB (printed circuit board) for manufacturing a semiconductor package. The PCB includes a plurality of semiconductor package unit frames; a scribe lane dividing the plurality of semiconductor package unit frames; and a printed circuit pattern for plating directly connected to a plurality of bond fingers on the semiconductor package unit frames and disposed to cross the scribe lane between adjacent semiconductor package unit frames.
    Type: Grant
    Filed: January 2, 2009
    Date of Patent: April 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-Chul Lim
  • Publication number: 20100014264
    Abstract: A PCB (printed circuit board) for manufacturing a semiconductor package. The PCB includes a plurality of semiconductor package unit frames; a scribe lane dividing the plurality of semiconductor package unit frames; and a printed circuit pattern for plating directly connected to a plurality of bond fingers on the semiconductor package unit frames and disposed to cross the scribe lane between adjacent semiconductor package unit frames.
    Type: Application
    Filed: January 2, 2009
    Publication date: January 21, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Won-Chul LIM
  • Patent number: 7425466
    Abstract: A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: September 16, 2008
    Assignee: Samsung Electronics Co., Ltd
    Inventor: Won-Chul Lim
  • Publication number: 20070290372
    Abstract: A semiconductor device having a wire loop and a method and apparatus for manufacturing the semiconductor device are provided. The semiconductor device includes a wiring board having an electrode pad, a semiconductor chip having a bonding pad and attached on a top surface of the wiring board while exposing the electrode pad, and a wire loop electrically connecting the bonding pad of the semiconductor chip to the electrode pad of the wiring board. The wire loop includes a contact ball bonded on the bonding pad and a wire extending from a side portion of the contact ball and bonded on the electrode pad of the wiring board.
    Type: Application
    Filed: June 11, 2007
    Publication date: December 20, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Won-Chul LIM
  • Publication number: 20070141754
    Abstract: A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.
    Type: Application
    Filed: February 27, 2007
    Publication date: June 21, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Won-Chul LIM
  • Patent number: 7199465
    Abstract: A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: April 3, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-Chul Lim
  • Publication number: 20070029650
    Abstract: A semiconductor package presents Z-shaped outer leads. The outer leads have a first portion located near an upper surface of a package body, a second portion, and a third portion located near a lower surface of a package body. A second similar semiconductor package may be stacked on the first semiconductor package with the third portion of the second semiconductor package located on and electrically connected to the first portion of the first semiconductor package. In each of the first and second semiconductor packages, a distance between the bottom surface of the third portion of the outer lead and the lower surface of a package body may be greater than a distance between the top surface of the first portion of the outer lead and the upper surface of the package body.
    Type: Application
    Filed: February 23, 2006
    Publication date: February 8, 2007
    Inventors: Won-Chul Lim, Sang-Yeop Lee
  • Publication number: 20050236705
    Abstract: A semiconductor package wire bonding system and method of use are provided. The wire bonding system includes a heating block that heats and supports a printed circuit board on which a multi-layered semiconductor chip structure having an overhang is mounted. A support inserted through an opening in the printed circuit board supporting the overhang portion of the semiconductor chip structure is installed in a predetermined region of the heating block. Multiple supports on the heating block may support overhand portions on multiple semiconductor chip structures.
    Type: Application
    Filed: April 6, 2005
    Publication date: October 27, 2005
    Inventor: Won-Chul Lim