Patents by Inventor Wonjae L. Kang

Wonjae L. Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7531836
    Abstract: Embodiments of the invention include on-chip transistor degradation detection and compensation. In one embodiment of the invention, an integrated circuit is provided including a circuit with a body bias terminal coupled to a body of one or more transistors to receive a body bias voltage; a programmable degradation monitor to detect aging of transistors, and a body bias voltage generator coupled to the circuit and the programmable degradation monitor. The body bias voltage generator to adjust the body bias voltage coupled into the circuit in response to transistor aging detected by the programmable degradation monitor. The programmable degradation monitor includes a reference ring oscillator, an aged ring oscillator, and a comparison circuit. The comparison circuit to compare data delays in the reference ring oscillator and the aged ring oscillator to detect transistor aging within the integrated circuit.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: May 12, 2009
    Assignee: Intel Corporation
    Inventors: Jonathan H. Liu, Wonjae L. Kang
  • Patent number: 7338817
    Abstract: Embodiments of the invention include on-chip transistor degradation detection and compensation. In one embodiment of the invention, an integrated circuit is provided including a circuit with a body bias terminal coupled to a body of one or more transistors to receive a body bias voltage; a programmable degradation monitor to detect aging of transistors, and a body bias voltage generator coupled to the circuit and the programmable degradation monitor. The body bias voltage generator to adjust the body bias voltage coupled into the circuit in response to transistor aging detected by the programmable degradation monitor. The programmable degradation monitor includes a reference ring oscillator, an aged ring oscillator, and a comparison circuit. The comparison circuit to compare data delays in the reference ring oscillator and the aged ring oscillator to detect transistor aging within the integrated circuit.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: March 4, 2008
    Assignee: Intel Corporation
    Inventors: Jonathan H. Liu, Wonjae L. Kang
  • Patent number: 7038480
    Abstract: The present invention is related to method and apparatus for on-die noise detection that includes one more voltage noise sensors, and one or more associated comparators. The voltage noise sensor includes a circuit including devices designed to position an initial voltage level of nodes between the devices at certain levels. The nodes are paired where the initial level of one node is above the initial level of the other node in the pair. The devices are designed to position the initial voltage levels of nodes of each pair such that the occurrence of noise above a predefined threshold voltage causes at least one of the voltage levels at the pair of nodes to approach and pass the other. The comparator monitors the voltage levels of each pair of nodes and generates a trigger signal upon detection of the voltage levels at a pair of nodes passing each other.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: May 2, 2006
    Assignee: Intel Corporation
    Inventors: Jonathan H. Liu, Wonjae L. Kang
  • Patent number: 6842027
    Abstract: An on-die noise detection circuit includes one or more voltage noise sensors, and one or more associated comparators. The voltage noise sensor includes a circuit including devices designed to position an initial voltage level of nodes between the devices at certain levels. The nodes are paired where the initial level of one node is above the initial level of the other node in the pair. The devices are designed to position the initial voltage levels of nodes of each pair such that the occurrence of noise above a predefined threshold voltage causes at least one of the voltage levels at the pair of nodes to approach and pass the other. The comparator monitors the voltage levels of each pair of nodes and generates a trigger signal upon detection of the voltage levels at a pair of nodes passing each other.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: January 11, 2005
    Assignee: Intel Corporation
    Inventors: Jonathan H. Liu, Wonjae L. Kang
  • Publication number: 20040135617
    Abstract: The present invention is related to method and apparatus for on-die noise detection that includes one more voltage noise sensors, and one or more associated comparators. The voltage noise sensor includes a circuit including devices designed to position an initial voltage level of nodes between the devices at certain levels. The nodes are paired where the initial level of one node is above the initial level of the other node in the pair. The devices are designed to position the initial voltage levels of nodes of each pair such that the occurrence of noise above a predefined threshold voltage causes at least one of the voltage levels at the pair of nodes to approach and pass the other. The comparator monitors the voltage levels of each pair of nodes and generates a trigger signal upon detection of the voltage levels at a pair of nodes passing each other.
    Type: Application
    Filed: December 24, 2003
    Publication date: July 15, 2004
    Inventors: Jonathan H. Liu, Wonjae L. Kang
  • Publication number: 20040066208
    Abstract: The present invention is related to method and apparatus for on-die noise detection that includes one more voltage noise sensors, and one or more associated comparators. The voltage noise sensor includes a circuit including devices designed to position an initial voltage level of nodes between the devices at certain levels. The nodes are paired where the initial level of one node is above the initial level of the other node in the pair. The devices are designed to position the initial voltage levels of nodes of each pair such that the occurrence of noise above a predefined threshold voltage causes at least one of the voltage levels at the pair of nodes to approach and pass the other. The comparator monitors the voltage levels of each pair of nodes and generates a trigger signal upon detection of the voltage levels at a pair of nodes passing each other.
    Type: Application
    Filed: October 7, 2002
    Publication date: April 8, 2004
    Inventors: Jonathan H. Liu, Wonjae L. Kang
  • Patent number: 5552338
    Abstract: A method for blowing a fuse in an IC device using the current generated by latchup. A fuse comprising a conductive material is caused to electrically open by directing a latchup current through the conductive material. The latchup current is generated by properly biasing parasitic bipolar transistors formed within the semiconductor substrate of the IC device, causing these parasitic transistors to latch up.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: September 3, 1996
    Assignee: Intel Corporation
    Inventor: Wonjae L. Kang