Abstract: A vacuum cleaner is provided, which includes a main body; a dust collection unit arranged in the main body to collect dusts from air that flows into the main body along an intake passage; and a suction unit arranged at a downstream that is lower than a location of the dust collection unit on the intake passage to provide a suction force, wherein the suction unit includes a suction force generator, an exhaust passage configured to switch a discharge direction of the air that has passed through the suction force generator at least twice, and a plurality of sound-absorbing members arranged on the exhaust passage to pass the air therethrough.

Abstract: A vacuum cleaner is provided, which includes a main body; a dust collection unit arranged in the main body to collect dusts from air that flows into the main body along an intake passage; and a suction unit arranged at a downstream that is lower than a location of the dust collection unit on the intake passage to provide a suction force, wherein the suction unit includes a suction force generator, an exhaust passage configured to switch a discharge direction of the air that has passed through the suction force generator at least twice, and a plurality of sound-absorbing members arranged on the exhaust passage to pass the air therethrough.

Abstract: In a method for manufacturing a semiconductor device, a silicon oxide layer is formed on a substrate. The silicon oxide layer is treated with a solution comprising ozone. Then, a conductive layer is formed on the silicon oxide layer treated with the solution.

Abstract: A non-volatile memory device and a method of fabricating the same are provided. The method can include disposing an isolation layer on a semiconductor substrate. The isolation layer may protrude from the main surface of the semiconductor substrate and define an active region. In a recess defined by the protrusion of the isolation layer and the active region, a diffusion-retarding poly pattern and a floating gate may be formed in sequence. A control gate may be disposed on the isolation layer to cover the diffusion-retarding poly pattern and the floating gate.

Abstract: A semiconductor device may include a tunnel insulating layer disposed on an active region of a substrate, field insulating patterns disposed in surface portions of the substrate to define the active region, each of the field insulating patterns having an upper recess formed at an upper surface portion thereof, a stacked structure disposed on the tunnel insulating layer, and impurity diffusion regions disposed at surface portions of the active region adjacent to the stacked structure.

Abstract: A semiconductor device may include a tunnel insulating layer disposed on an active region of a substrate, field insulating patterns disposed in surface portions of the substrate to define the active region, each of the field insulating patterns having an upper recess formed at an upper surface portion thereof, a stacked structure disposed on the tunnel insulating layer, and impurity diffusion regions disposed at surface portions of the active region adjacent to the stacked structure.

Abstract: In a method for manufacturing a semiconductor device, a silicon oxide layer is formed on a substrate. The silicon oxide layer is treated with a solution comprising ozone. Then, a conductive layer is formed on the silicon oxide layer treated with the solution.

Abstract: In a method of forming a thin layer (e.g., a charge trapping nitride layer) of a semiconductor device (e.g. a charge trapping type non-volatile memory device), the nitride layer may be formed on a first area of a substrate. A blocking layer may be formed on the nitride layer. An oxide layer may be formed on a second area of the substrate while preventing or reducing an oxidation of the nitride layer by a radical oxidation process in which oxygen radicals react with the second area of the substrate and the blocking layer in the first area of the substrate. The nitride layer may ensure sufficient charge trapping sites and may have a uniform thickness without oxidation thereof in the radical oxidation process.

Abstract: A non-volatile memory device and a method of fabricating the same are provided. The method can include disposing an isolation layer on a semiconductor substrate. The isolation layer may protrude from the main surface of the semiconductor substrate and define an active region. In a recess defined by the protrusion of the isolation layer and the active region, a diffusion-retarding poly pattern and a floating gate may be formed in sequence. A control gate may be disposed on the isolation layer to cover the diffusion-retarding poly pattern and the floating gate.

Abstract: An etch stop layer is formed over a first structure by depositing a metal oxide material over the first structure and annealing the deposited metal oxide material. A second structure is formed over the etch stop layer, and a formation is etched through the second structure using the etch stop layer as an etch stop.

Abstract: In an embodiment, a storage electrode of a capacitor in a semiconductor device is resistant to inadvertent etching during its manufacturing processes. A method of forming the storage electrode of the capacitor is described. The storage electrode of the capacitor may include a first metal layer electrically connected with a source region of a transistor through a contact plug penetrating an insulating layer on a semiconductor substrate. A polysilicon layer may then be formed on the first metal layer. A second metal layer is formed on the polysilicon layer.

Abstract: A method of forming a floating gate of a non-volatile memory device can include etching a mask pattern formed between field isolation regions in a field isolation pattern on a substrate to recess a surface of the mask pattern below an upper surface of adjacent field isolation regions to form an opening having a width defined by a side wall of the adjacent field isolation regions above the surface. Then the adjacent field isolation regions is etched to increase the width of the opening.

Abstract: In a method of manufacturing a semiconductor device such as a flash memory device, an insulating pattern having an opening is formed to partially expose a surface of a substrate. A first silicon layer is formed on the exposed surface portion of the substrate and the insulating pattern. The first silicon layer has an opened seam overlying the previously exposed portion of the substrate. A heat treatment on the substrate is performed at a temperature sufficient to induce silicon migration so as to cause the opened seam to be closed via the silicon migration. A second silicon layer is then formed on the first silicon layer. Thus, surface profile of a floating gate electrode obtained from the first and second silicon layers may be improved.

Abstract: A semiconductor device may include a tunnel insulating layer disposed on an active region of a substrate, field insulating patterns disposed in surface portions of the substrate to define the active region, each of the field insulating patterns having an upper recess formed at an upper surface portion thereof, a stacked structure disposed on the tunnel insulating layer, and impurity diffusion regions disposed at surface portions of the active region adjacent to the stacked structure.

Abstract: A method of fabricating a nonvolatile memory device includes forming at least one insulating layer on at least one of a semiconductor substrate and a layer including a semi-conductive material, and performing a plasma process using fluorine on the semiconductor. In some cases, an interface between the insulating layer and the semiconductor substrate includes fluorine.

Abstract: In a method of forming a thin layer (e.g., a charge trapping nitride layer) of a semiconductor device (e.g. a charge trapping type non-volatile memory device), the nitride layer may be formed on a first area of a substrate. A blocking layer may be formed on the nitride layer. An oxide layer may be formed on a second area of the substrate while preventing or reducing an oxidation of the nitride layer by a radical oxidation process in which oxygen radicals react with the second area of the substrate and the blocking layer in the first area of the substrate. The nitride layer may ensure sufficient charge trapping sites and may have a uniform thickness without oxidation thereof in the radical oxidation process.

Abstract: Methods of fabricating semiconductor devices including forming a mask pattern on a semiconductor substrate are provided. The mask pattern defines a first opening that at least partially exposes the semiconductor substrate and includes a pad oxide layer and a nitride layer pattern on the pad oxide layer pattern. The nitride layer has a line width substantially larger than the pad oxide layer pattern. A second opening that is connected to the first opening is formed by at least partially removing a portion of the semiconductor substrate exposed through the first opening. The second opening has a sidewall that has a first inclination angle and at least partially exposing the semiconductor substrate. A trench connected to the second opening is formed by etching a portion of the semiconductor substrate exposed through the second opening using the mask pattern as an etch mask.

Abstract: In a method of manufacturing a semiconductor device, a polysilicon layer doped with impurities is formed on a front side and a backside of a substrate. An insulation layer is formed on the substrate having the polysilicon layer to cover the polysilicon layer on the backside of the substrate. The insulation layer on the front side of the substrate is partially etched to partially expose the front side of the substrate. An oxidation process using oxygen radicals is then carried out to form an oxide layer on the exposed front side of the substrate Thus, when the oxidation process is carried out, the insulation layer prevents impurities in the polysilicon layer on the backside of the substrate from being outgassed. As a result electrical characteristics of the transistor formed on the front side of the substrate may not be deteriorated.

Abstract: In a method of manufacturing a memory device, a tunnel insulation layer and a floating gate layer are formed on a semiconductor substrate. A top surface of the floating gate layer is converted into a first nitride layer by a first nitridation treatment process. The first nitride layer is converted into a first oxynitride layer by a radical oxidation process. A lower oxide layer is formed on the first oxynitride layer by an LPCVD process. A second nitride layer and an upper oxide layer are formed on the lower oxide layer. A conductive layer is formed on the upper oxide layer. Thus, a multi-layered dielectric layer including the first oxynitride layer, the lower oxide layer, the second nitride layer, the upper oxide layer and the densified second oxynitride layer may have an increased capacitance without having degenerated leakage current characteristics.

Abstract: Methods of fabricating a floating gate of a flash memory cell are provided in which a first polysilicon layer is formed between first and second isolation layers. An upper region of the first polysilicon layer is then oxidized. The oxidized upper region of the first polysilicon layer is subsequently removed. A second polysilicon layer is formed on the first polysilicon layer. The second polysilicon layer and the first polysilicon layer are patterned to form the floating gate.