Patents by Inventor Wonll Kwon

Wonll Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer
    Patent number: 9252093
    Abstract: A semiconductor wafer has a contact pad. A first insulating layer is formed over the wafer. A second insulating layer is formed over the first insulating layer and contact pad. A portion of the second insulating layer is removed to expose the contact pad. A first UBM layer is formed over and follows a contour of the second insulating layer and contact pad to create a well over the contact pad. A first buffer layer is formed in the well over the first UBM layer and the contact pad. A second UBM layer is formed over the first UBM layer and first buffer layer. A third UBM layer is formed over the second UBM layer. A bump is formed over the third UBM layer. The first buffer layer reduces stress on the bump and contact pad. A second buffer layer can be formed between the second and third UBM layers.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: February 2, 2016
    Assignee: STATS ChipPAC, Ltd.
    Inventors: DaeSik Choi, JoonYoung Choi, Wonll Kwon
  • Integrated circuit packaging system with coupling features and method of manufacture thereof
    Patent number: 8710670
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a wafer substrate having an active side containing a contact; forming a through silicon via extending through the wafer substrate electrically connected to the contact having a via width; forming a first coupling feature extending from a top side of the through silicon via; and forming a second coupling feature on the side of the through silicon via opposite the first coupling feature.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: April 29, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventors: MinJung Kim, DaeSik Choi, Wonll Kwon
  • Semiconductor device and method of forming multi-layered UBM with intermediate insulating buffer layer to reduce stress for semiconductor wafer
    Patent number: 8642469
    Abstract: A semiconductor wafer has a contact pad. A first insulating layer is formed over the wafer. A second insulating layer is formed over the first insulating layer and contact pad. A portion of the second insulating layer is removed to expose the contact pad. A first UBM layer is formed over and follows a contour of the second insulating layer and contact pad to create a well over the contact pad. A first buffer layer is formed in the well over the first UBM layer and the contact pad. A second UBM layer is formed over the first UBM layer and first buffer layer. A third UBM layer is formed over the second UBM layer. A bump is formed over the third UBM layer. The first buffer layer reduces stress on the bump and contact pad. A second buffer layer can be formed between the second and third UBM layers.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: February 4, 2014
    Assignee: STATS ChipPAC, Ltd.
    Inventors: DaeSik Choi, JoonYoung Choi, Wonll Kwon