Patents by Inventor Wonmuk Lim

Wonmuk Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device including clock signal correction circuit, memory system, and operating method of memory device
    Patent number: 12675227
    Abstract: A memory device includes a clock signal correction circuit, a memory system, and an operating method of the memory device. The memory device may include a first correction circuit configured to adjust phases of first to fourth clock signals and output first to fourth corrected clock signals, a second correction circuit configured to output first to fourth offset clock signals based on a size of each of first to fourth reference data included in a first data signal, and a driver configured to output a second data signal based on the first to fourth corrected clock signals.
    Type: Grant
    Filed: October 15, 2024
    Date of Patent: July 7, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wonmuk Lim, Seunghwan Hong
  • Preamble detection circuit, operation method thereof, and memory device
    Patent number: 12555619
    Abstract: A preamble detection circuit, an operating method thereof, and a memory device are provided. The preamble detection circuit includes a comparison circuit configured to compare a level of a data strobe signal with a level of a reference voltage and to output a comparison signal, and a reset signal generation circuit configured to output a reset signal having a pulse width corresponding to a preamble period of the data strobe signal based on the comparison signal.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: February 17, 2026
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wangsoo Kim, Minkyung Kim, Wonmuk Lim
  • MEMORY DEVICE INCLUDING CLOCK SIGNAL CORRECTION CIRCUIT, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY DEVICE
    Publication number: 20250231693
    Abstract: A memory device includes a clock signal correction circuit, a memory system, and an operating method of the memory device. The memory device may include a first correction circuit configured to adjust phases of first to fourth clock signals and output first to fourth corrected clock signals, a second correction circuit configured to output first to fourth offset clock signals based on a size of each of first to fourth reference data included in a first data signal, and a driver configured to output a second data signal based on the first to fourth corrected clock signals.
    Type: Application
    Filed: October 15, 2024
    Publication date: July 17, 2025
    Inventors: Wonmuk Lim, Seunghwan Hong
  • PREAMBLE DETECTION CIRCUIT, OPERATION METHOD THEREOF, AND MEMORY DEVICE
    Publication number: 20240096384
    Abstract: A preamble detection circuit, an operating method thereof, and a memory device are provided. The preamble detection circuit includes a comparison circuit configured to compare a level of a data strobe signal with a level of a reference voltage and to output a comparison signal, and a reset signal generation circuit configured to output a reset signal having a pulse width corresponding to a preamble period of the data strobe signal based on the comparison signal.
    Type: Application
    Filed: May 30, 2023
    Publication date: March 21, 2024
    Inventors: Wangsoo Kim, Minkyung Kim, Wonmuk Lim