Patents by Inventor Wonwoo Kim

Wonwoo Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11980050
    Abstract: A display device includes: a substrate that includes an opening and a display area that surrounds the opening; a plurality of grooves formed in the substrate between the opening and the display area; a display element layer on the substrate and that includes a plurality of display elements in the display area; a thin-film encapsulation layer disposed on the display element layer, the thin-film encapsulation layer including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer which are sequentially stacked; a planarization layer disposed over the plurality of grooves and that includes an organic insulating material, wherein the planarization layer is disposed over the second inorganic encapsulation layer, and the organic encapsulation layer is disposed below the second inorganic encapsulation layer.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: May 7, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Wooyong Sung, Wonwoo Choi, Sooyoun Kim, Junghan Seo, Seoyeon Lee, Hyoungsub Lee, Moonwon Chang, Seunggun Chae, Seungyong Song
  • Patent number: 11977981
    Abstract: A device and method of operating the device for automatically creating photos or videos of a certain moment are provided. The method includes obtaining a plurality of image frames sequentially captured through a camera for a preset time interval; detecting at least one image frame among the plurality of image frames in which a main object corresponding to a preset main object or an action of the main object corresponding to a preset action is recognized; determining a type of composition of the at least one image frame; cropping a region including the main object from the at least one image frame based on placement of objects in the at least one image frame and the determined type of composition; and creating the photo using the cropped region.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: May 7, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gunill Lee, Jiwon Jeong, Taehyuk Kwon, Deokho Kim, Byeongwook Yoo, Wonwoo Lee, Jaewoong Lee, Sunghoon Yim
  • Patent number: 11974456
    Abstract: A display panel includes a plurality of display elements arranged in a display area, an opening, a multi-layer including a first layer and a second layer disposed on the first layer, and a groove. Each display element includes a pixel electrode, an emission layer disposed on the pixel electrode, and an opposite electrode disposed on the emission layer. The display area surrounds the opening. The groove is located between the opening and the display area. The groove has an undercut cross-section that is concave in a thickness direction of the multi-layer, the second layer includes a pair of tips that protrude toward a center of the groove, and a length of each tip is less than about 2 ?m.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: April 30, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Wonwoo Choi, Wooyong Sung, Sooyoun Kim, Junghan Seo, Seoyeon Lee, Hyoungsub Lee, Moonwon Chang, Seunggun Chae
  • Patent number: 11974300
    Abstract: A system and method of generating a control message of a digital unit (DU) of a base station in a wireless communication system supporting lower layer function division, and a system and method of processing a control message of a radio unit (RU) of the base station are provided. The system and method provide an RU of the base station that does not need to analyze the subframe structure in association with other control plane sections, such that processing time and processing complexity can be reduced.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wonwoo Rhim, Daejoong Kim, Jaeyoel Kim, Namryul Jeon, Sunguk Huh
  • Patent number: 11963154
    Abstract: The disclosure relates to a pre 5th generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th generation (4G) communication system such as long term evolution (LTE). A method for operating a radio unit (RU) of a base station is provided. The method includes transmitting, to a digital unit (DU), a first message comprising a value indicating the maximum number of masks for one resource area, and receiving, from the DU, a second message generated based on the value, wherein the mask may indicate resources to which the same beam is applied within the resource area.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: April 16, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sunguk Huh, Daejoong Kim, Jaeyoel Kim, Wonwoo Rhim, Namryul Jeon
  • Patent number: 11963408
    Abstract: A display apparatus includes a substrate, a first insulating layer on the substrate, first metal layers on the first insulating layer and having a compressive stress or a tensile stress of about 100 megapascals (MPa) or less, and a second insulating layer including a first layer covering the first metal layers and a second layer including a material different from a material of the first layer.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Wonwoo Choi, Inbae Kim, Changok Kim, Donghun Nam, Jinseock Kim, Hyuntae Kim
  • Patent number: 10699949
    Abstract: A cobalt contact includes a dual silicide barrier layer. The barrier layer, which may be formed in situ, includes silicides of titanium and cobalt, and provides an effective adhesion layer between the cobalt contact and a conductive device region such as the source/drain junction of a semiconductor device, eliminating void formation during a metal anneal.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: June 30, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Keith Kwong Hon Wong, Wonwoo Kim, Praneet Adusumilli
  • Publication number: 20190237365
    Abstract: A cobalt contact includes a dual silicide barrier layer. The barrier layer, which may be formed in situ, includes silicides of titanium and cobalt, and provides an effective adhesion layer between the cobalt contact and a conductive device region such as the source/drain junction of a semiconductor device, eliminating void formation during a metal anneal.
    Type: Application
    Filed: April 9, 2019
    Publication date: August 1, 2019
    Inventors: Keith Kwong Hon Wong, Wonwoo Kim, Praneet Adusumilli
  • Patent number: 10304735
    Abstract: A cobalt contact includes a dual silicide barrier layer. The barrier layer, which may be formed in situ, includes silicides of titanium and cobalt, and provides an effective adhesion layer between the cobalt contact and a conductive device region such as the source/drain junction of a semiconductor device, eliminating void formation during a metal anneal.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: May 28, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Keith Kwong Hon Wong, Wonwoo Kim, Praneet Adusumilli
  • Publication number: 20180374749
    Abstract: A cobalt contact includes a dual silicide barrier layer. The barrier layer, which may be formed in situ, includes silicides of titanium and cobalt, and provides an effective adhesion layer between the cobalt contact and a conductive device region such as the source/drain junction of a semiconductor device, eliminating void formation during a metal anneal.
    Type: Application
    Filed: June 22, 2017
    Publication date: December 27, 2018
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Keith Kwong Hon WONG, Wonwoo KIM, Praneet ADUSUMILLI
  • Patent number: 9461111
    Abstract: A method of forming double and/or multiple numbers of fins of a FinFET device using a Si/SiGe selective epitaxial growth process and the resulting device are provided. Embodiments include forming a Si pillar in an oxide layer, the Si pillar having a bottom portion and a top portion; removing the top portion of the Si pillar; forming a SiGe pillar on the bottom portion of the Si pillar; reducing the SiGe pillar; forming a first set of Si fins on opposite sides of the reduced SiGe pillar; removing the SiGe pillar; replacing the Si fins with SiGe fins; reducing the SiGe fins; forming a second set of Si fins on opposite sides of the SiGe fins; and removing the SiGe fins.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: October 4, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: InSoo Jung, Wonwoo Kim
  • Publication number: 20150349054
    Abstract: A method of forming double and/or multiple numbers of fins of a FinFET device using a Si/SiGe selective epitaxial growth process and the resulting device are provided. Embodiments include forming a Si pillar in an oxide layer, the Si pillar having a bottom portion and a top portion; removing the top portion of the Si pillar; forming a SiGe pillar on the bottom portion of the Si pillar; reducing the SiGe pillar; forming a first set of Si fins on opposite sides of the reduced SiGe pillar; removing the SiGe pillar; replacing the Si fins with SiGe fins; reducing the SiGe fins; forming a second set of Si fins on opposite sides of the SiGe fins; and removing the SiGe fins.
    Type: Application
    Filed: August 10, 2015
    Publication date: December 3, 2015
    Inventors: InSoo JUNG, Wonwoo KIM
  • Patent number: 9142418
    Abstract: A method of forming double and/or multiple numbers of fins of a FinFET device using a Si/SiGe selective epitaxial growth process and the resulting device are provided. Embodiments include forming a Si pillar in an oxide layer, the Si pillar having a bottom portion and a top portion; removing the top portion of the Si pillar; forming a SiGe pillar on the bottom portion of the Si pillar; reducing the SiGe pillar; forming a first set of Si fins on opposite sides of the reduced SiGe pillar; removing the SiGe pillar; replacing the Si fins with SiGe fins; reducing the SiGe fins; forming a second set of Si fins on opposite sides of the SiGe fins; and removing the SiGe fins.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: September 22, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: InSoo Jung, Wonwoo Kim
  • Publication number: 20140327139
    Abstract: Contact structures and methods of fabricating contact structures of semiconductor devices are provided. One method includes, for instance: obtaining a substrate including a dielectric layer over the substrate; patterning the dielectric layer with at least one contact opening; providing a contact liner within the at least one contact opening in the dielectric layer; and filling the contact liner with a conductive material. In enhanced aspects, providing the contact liner within the at least one contact opening includes: depositing a first layer within the at least one contact opening in the dielectric layer; depositing a second layer over the first layer within the at least one contact opening; depositing at least one intermediate layer over the second layer within the at least one contact opening; and depositing a top layer over the at least one intermediate layer within the at least one contact opening.
    Type: Application
    Filed: May 2, 2013
    Publication date: November 6, 2014
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Jialin YU, Jilin XIA, Huang LIU, Wonwoo KIM, Changyong XIAO
  • Patent number: 8803254
    Abstract: One illustrative gate structure for an NFET device includes a gate insulation layer formed above a semiconducting substrate, a first metal layer comprised of titanium nitride (TiN) positioned above the gate insulation layer, a second metal layer comprised of tantalum nitride (TaN) positioned above the first metal layer, a third metal layer comprised of titanium aluminum (TiAl) positioned above the second metal layer, a fourth metal layer comprised of an aluminum-containing material positioned above the third metal layer, a fifth metal layer comprised of titanium positioned above the fourth metal layer, and a layer of aluminum positioned above the fifth metal layer.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: August 12, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Jean-Baptiste Laloe, Huang Liu, Wonwoo Kim
  • Publication number: 20140145274
    Abstract: One illustrative gate structure for an NFET device includes a gate insulation layer formed above a semiconducting substrate, a first metal layer comprised of titanium nitride (TiN) positioned above the gate insulation layer, a second metal layer comprised of tantalum nitride (TaN) positioned above the first metal layer, a third metal layer comprised of titanium aluminum (TiAl) positioned above the second metal layer, a fourth metal layer comprised of an aluminum-containing material positioned above the third metal layer, a fifth metal layer comprised of titanium positioned above the fourth metal layer, and a layer of aluminum positioned above the fifth metal layer.
    Type: Application
    Filed: November 28, 2012
    Publication date: May 29, 2014
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Jean-Baptiste Laloe, Huang Liu, Wonwoo Kim
  • Patent number: 8168543
    Abstract: Methods of forming a barrier layer are provided. In one embodiment, the method includes providing a substrate into a physical vapor deposition (PVD) chamber, supplying at least two reactive gases and an inert gas into the PVD chamber, sputtering a source material from a target disposed in the processing chamber in the presence of a plasma formed from the gas mixture, and forming a metal containing dielectric layer on the substrate from the source material. In another embodiment, the method includes providing a substrate into a PVD chamber, supplying a reactive gas the PVD chamber, sputtering a source material from a target disposed in the PVD chamber in the presence of a plasma formed from the reactive gas, forming a metal containing dielectric layer on the substrate from the source material, and post treating the metal containing layer in presence of species generated from a remote plasma chamber.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: May 1, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Xinyu Fu, Keyvan Kashefizadeh, Ashish Subhash Bodke, Winsor Lam, Yiochiro Tanaka, Wonwoo Kim
  • Publication number: 20100006425
    Abstract: Methods of forming a barrier layer are provided. In one embodiment, the method includes providing a substrate into a physical vapor deposition (PVD) chamber, supplying at least two reactive gases and an inert gas into the PVD chamber, sputtering a source material from a target disposed in the processing chamber in the presence of a plasma formed from the gas mixture, and forming a metal containing dielectric layer on the substrate from the source material. In another embodiment, the method includes providing a substrate into a PVD chamber, supplying a reactive gas the PVD chamber, sputtering a source material from a target disposed in the PVD chamber in the presence of a plasma formed from the reactive gas, forming a metal containing dielectric layer on the substrate from the source material, and post treating the metal containing layer in presence of species generated from a remote plasma chamber.
    Type: Application
    Filed: September 18, 2009
    Publication date: January 14, 2010
    Inventors: Xinyu Fu, Keyvan Kashefizadeh, Ashish Subhash Bodke, Winsor Lam, Yiochiro Tanaka, Wonwoo Kim
  • Patent number: 7618893
    Abstract: Methods of forming a barrier layer are provided. In one embodiment, the method includes providing a substrate into a physical valor deposition (PVD) chamber, supplying at least two reactive gases and an inert gas into the PVD chamber, sputtering a source material from a target disposed in the processing chamber in the presence of a plasma formed from the gas mixture, and forming a metal containing dielectric layer on the substrate from the source material. In another embodiment, the method includes providing a substrate into a PVD chamber, supplying a reactive gas the PVD chamber, sputtering a source material from a target disposed in the PVD chamber in the presence of a plasma formed from the reactive gas, forming a metal containing dielectric layer on the substrate from the source material, and post treating the metal containing layer in presence of species generated from a remote plasma chamber.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: November 17, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Xinyu Fu, Keyvan Kashefizadeh, Ashish Subhash Bodke, Winsor Lam, Yiochiro Tanaka, Wonwoo Kim
  • Publication number: 20090227105
    Abstract: Methods of forming a barrier layer are provided. In one embodiment, the method includes providing a substrate into a physical vapor deposition (PVD) chamber, supplying at least two reactive gases and an inert gas into the PVD processing chamber, sputtering a source material from a target disposed in the processing chamber in the presence of a plasma formed from the gas mixture, and forming a metal containing dielectric layer on the substrate from the source material. In another embodiment, the method includes providing a substrate into a PVD chamber, supplying a reactive gas the PVD chamber, sputtering a source material from a target disposed in the PVD chamber in the presence of a plasma formed from the reactive gas, forming a metal containing dielectric layer on the substrate from the source material, and post treating the metal containing layer in presence of species generated from a remote plasma chamber.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 10, 2009
    Inventors: Xinyu Fu, Keyvan Kashefizadeh, Ashish Subhash Bodke, Winsor Lam, Yiochiro Tanaka, Wonwoo Kim