Patents by Inventor Woo-Bin Jung

Woo-Bin Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250067705
    Abstract: An electrochemical apparatus includes an array of pixels disposed on a chip, stimulator circuitry disposed on the chip and configured to provide electrical input signals to cause stimulation of the pixels of the array, and sensor circuitry disposed on the chip and configured to read electrical output signals from the pixels of the array. The stimulator circuitry is configured to provide the input signals to cause stimulation of the pixels individually, and the sensor circuitry is configured to selectively read the output signals from the pixels while the pixels are being stimulated. The sensor circuitry is configured to measure an open-circuit voltage at each of the pixels and a current flow at each of the pixels while the pixels are being stimulated by the stimulator circuitry. The open-circuit voltage may be measured while the current flow is being measured.
    Type: Application
    Filed: June 13, 2022
    Publication date: February 27, 2025
    Applicant: President and Fellows of Harvard College
    Inventors: Donhee Ham, Young-Ha Hwang, Henry Julian Hinton, Han Sae Jung, Woo-Bin Jung
  • Patent number: 12103844
    Abstract: A method of fabricating nanostructures using macro pre-patterns according to the present invention, which comprises either depositing a target material on a substrate having macro pre-patterns formed thereon, or applying a target material to a substrate and then forming macro pre-patterns on the substrate, and then depositing the target material on the side surface of the macro pre-patterns by an ion bombardment phenomenon occurring during etching, provides a three-dimensional nanostructures with high aspect ratio and uniformity can be fabricated by a simple process at low cost by using the ion bombardment phenomenon occurring during physical ion etching, thereby achieving the high performance of future nano-devices, such as nanosized electronic devices, optical devices, bio devices and energy devices.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: October 1, 2024
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Hee-Tae Jung, Hwan-Jin Jeon, Woo-Bin Jung
  • Publication number: 20240280535
    Abstract: Devices and methods for controlling the local pH of solutions (e.g., for parallelized polymer synthesis) are generally described. These may offer several advantages, including the ability to control pH using a plurality of pixels, and/or the ability to sense the pH associated with each pixel, according to certain embodiments. In some embodiments, such devices are used to selectively synthesize polymer sequences (e.g., DNA sequences) associated with each pixel. The pixels can, in some embodiments, comprise electrodes that can apply an electrical potential or current to a solution comprising an electrically sensitive pH modifier. In some cases, reaction of the electrically sensitive pH modifier may cause a change in pH. The pixels may comprise circuit components that can operate in multiple modes (e.g. as potentiostats, galvanostats, or open-circuit potential sensors capable of sensing local pH).
    Type: Application
    Filed: June 13, 2022
    Publication date: August 22, 2024
    Applicant: President and Fellows of Harvard College
    Inventors: Donhee Ham, Woo-Bin Jung, Han Sae Jung, Jun Wang, Young-Ha Hwang, Henry Julian Hinton, Jeffrey T. Abbott, Hongkun Park
  • Publication number: 20240194568
    Abstract: A substrate includes a first layer including a first power line extending in a first direction and a second power line extending in the first direction, and a second layer disposed under the first layer. The second layer includes a third power line extending in a second direction different from the first direction, and a fourth power line extending in the second direction, a first via electrically connecting the first power line and the third power line to each other, and a second via electrically connecting the second power line and the fourth power line to each other. A first voltage is transferred via the third power line, the first via, and the first power line, and a second voltage is transferred via the fourth power line, the second via, and the second power line.
    Type: Application
    Filed: November 20, 2023
    Publication date: June 13, 2024
    Inventors: JI SOO HWANG, JUN SO PAK, HEE SEOK LEE, WOO BIN JUNG
  • Publication number: 20240047852
    Abstract: A semiconductor device can comprise a substrate dielectric structure and a substrate conductive structure that traverses the substrate dielectric structure and comprises first and second substrate terminals; an electronic component with a component terminal coupled to the first substrate terminal; and a first antenna element with a first element terminal coupled to the second substrate terminal, a first element head side adjacent a first antenna pattern, a first element base side opposite the first element side, and a first element sidewall. The first element terminal can be exposed from the first element dielectric structure at the first element base side or at the first element sidewall. The first antenna pattern can be coupled to the substrate through the first element terminal. The substrate conductive structure can couple the first antenna element to the electronic component. Other examples and methods are also disclosed.
    Type: Application
    Filed: August 29, 2023
    Publication date: February 8, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Kyoung Yeon Lee, Tae Yong Lee, Doo Soub Shin, Seon A Lee, Woo Bin Jung, Ji Yeon Ryu, Jin Young Khim
  • Patent number: 11742565
    Abstract: A semiconductor device can comprise a substrate dielectric structure and a substrate conductive structure that traverses the substrate dielectric structure and comprises first and second substrate terminals; an electronic component with a component terminal coupled to the first substrate terminal; and a first antenna element with a first element terminal coupled to the second substrate terminal, a first element head side adjacent a first antenna pattern, a first element base side opposite the first element side, and a first element sidewall. The first element terminal can be exposed from the first element dielectric structure at the first element base side or at the first element sidewall. The first antenna pattern can be coupled to the substrate through the first element terminal. The substrate conductive structure can couple the first antenna element to the electronic component. Other examples and methods are also disclosed.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: August 29, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Kyoung Yeon Lee, Tae Yong Lee, Doo Soub Shin, Seon A Lee, Woo Bin Jung, Ji Yeon Ryu, Jin Young Khim
  • Publication number: 20210376451
    Abstract: A semiconductor device can comprise a substrate dielectric structure and a substrate conductive structure that traverses the substrate dielectric structure and comprises first and second substrate terminals; an electronic component with a component terminal coupled to the first substrate terminal; and a first antenna element with a first element terminal coupled to the second substrate terminal, a first element head side adjacent a first antenna pattern, a first element base side opposite the first element side, and a first element sidewall. The first element terminal can be exposed from the first element dielectric structure at the first element base side or at the first element sidewall. The first antenna pattern can be coupled to the substrate through the first element terminal. The substrate conductive structure can couple the first antenna element to the electronic component. Other examples and methods are also disclosed.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 2, 2021
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Kyoung Yeon Lee, Tae Yong Lee, Doo Soub Shin, Seon A Lee, Woo Bin Jung, Ji Yeon Ryu, Jin Young Khim
  • Patent number: 11101540
    Abstract: A semiconductor device can comprise a substrate dielectric structure and a substrate conductive structure that traverses the substrate dielectric structure and comprises first and second substrate terminals; an electronic component with a component terminal coupled to the first substrate terminal; and a first antenna element with a first element terminal coupled to the second substrate terminal, a first element head side adjacent a first antenna pattern, a first element base side opposite the first element side, and a first element sidewall. The first element terminal can be exposed from the first element dielectric structure at the first element base side or at the first element sidewall. The first antenna pattern can be coupled to the substrate through the first element terminal. The substrate conductive structure can couple the first antenna element to the electronic component. Other examples and methods are also disclosed.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: August 24, 2021
    Assignee: Amkor Technology Singapore Holding PTE. LTD.
    Inventors: Kyoung Yeon Lee, Tae Yong Lee, Doo Soub Shin, Seon A Lee, Woo Bin Jung, Ji Yeon Ryu, Jin Young Khim
  • Publication number: 20210104809
    Abstract: A semiconductor device can comprise a substrate dielectric structure and a substrate conductive structure that traverses the substrate dielectric structure and comprises first and second substrate terminals; an electronic component with a component terminal coupled to the first substrate terminal; and a first antenna element with a first element terminal coupled to the second substrate terminal, a first element head side adjacent a first antenna pattern, a first element base side opposite the first element side, and a first element sidewall. The first element terminal can be exposed from the first element dielectric structure at the first element base side or at the first element sidewall. The first antenna pattern can be coupled to the substrate through the first element terminal. The substrate conductive structure can couple the first antenna element to the electronic component. Other examples and methods are also disclosed.
    Type: Application
    Filed: October 2, 2019
    Publication date: April 8, 2021
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Kyoung Yeon Lee, Tae Yong Lee, Doo Soub Shin, Seon A. Lee, Woo Bin Jung, Ji Yeon Ryu, Jin Young Khim
  • Publication number: 20210095385
    Abstract: A method of fabricating a working electrode adapted for reduction of carbon dioxide comprises layering a gold film (Au) over a shrinkable polymer to create a layered structure, heating the layered structure to cause shrinking, for instance, at a temperature of about 130° C., and removing the shrinkable polymer layer. The heating creates a contracted, wrinkled Au film surface owing to a difference in thermal coefficient between the Au film and the underlaying polymer prior to removal of the polymer, and the wrinkled film contains c-shaped wrinkles containing confined spaces in which a local elevated pH level is attained.
    Type: Application
    Filed: September 30, 2019
    Publication date: April 1, 2021
    Inventors: Issam Gereige, Hee-Tae Jung, Kyeong Min Cho, Woo-Bin Jung
  • Publication number: 20200225185
    Abstract: The present disclosure relates to a sensor including a nanostructure and a method for manufacturing the same.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 16, 2020
    Inventors: Hee-Tae JUNG, Hohyung KANG, Heeeun JOO, Soo Yeon CHO, Woo-Bin JUNG
  • Publication number: 20200102644
    Abstract: Disclosed is a method of producing a multicomponent nanopattern having a regular array and allowing a variety of combinations of compositions by depositing a film including a multicomponent material on a substrate having a prepattern formed thereon and then conducting ion-etching thereon twice. The method can be utilized in a variety of applications requiring considerably regularly arranged multicomponent nanostructures such as transistors, organic optoelectronic devices, catalysts and gas sensors.
    Type: Application
    Filed: September 26, 2019
    Publication date: April 2, 2020
    Inventors: Hee-Tae JUNG, Woo Bin JUNG
  • Publication number: 20190326559
    Abstract: According to the present disclosure, a method of forming a pattern may include forming guide patterns on a substrate, wherein a trench is provided between the guide patterns, forming an organic-inorganic pattern including organic supramolecular structures in the trench, and annealing the organic-inorganic pattern, thereby aligning the dendrimer structures in parallel with one direction.
    Type: Application
    Filed: November 21, 2018
    Publication date: October 24, 2019
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hee-Tae JUNG, Kangho Park, Woo-Bin Jung, Kiok Kwon