Patents by Inventor Woo-Cheol LEE

Woo-Cheol LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250093100
    Abstract: In one aspect, an electric furnace is provided with a double type melting furnace, which includes: a first upper cell that forms a first upper space of a first melting furnace in which a first iron source is introduced and molten; a second upper cell that is disposed in a horizontal direction of the first upper cell and forms a second upper space of a second melting furnace in which a second iron source is introduced and molten; a lower cell that is combined with lower portions of the first upper cell and the second upper cell and forms a single integrated space in which a first lower space of the first melting furnace and a second lower space of the second melting furnace are integrated; and a partition wall unit that is installed to vertically move up and down between the first upper cell and the second upper cell, and separates the first lower space of the first melting furnace and the second lower space of the second melting furnace, although both of the lower spaces are integrally formed by the lower cel
    Type: Application
    Filed: December 3, 2024
    Publication date: March 20, 2025
    Inventors: Dae Hoon Shin, Kyun Tae Kim, Yong Hee Kim, Young Joo Park, Woo Seok Song, Myoung Cheol Shin, June Yong Eom, Jae Rang Lee, Jae Min Lee, Jong Oh Jo
  • Publication number: 20250087248
    Abstract: A semiconductor device may include first and second transistors on a substrate. The first transistor may include first and second source/drain regions; a first channel region between the first and second source/drain regions; a first gate electrode over the first channel region; and a charge retention node between the first channel region and the first gate electrode. The second transistor may include third and fourth source/drain regions, a portion of the third source/drain region being connected to the charge retention node; a second channel region between the third and fourth source/drain regions; and a second gate electrode over the second channel region.
    Type: Application
    Filed: January 16, 2024
    Publication date: March 13, 2025
    Inventor: Woo Cheol LEE
  • Patent number: 12223426
    Abstract: Provided is a method and apparatus for designing and testing an audio codec using quantization based on white noise modeling. A neural network-based audio encoder design method includes generating a quantized latent vector and a reconstructed signal corresponding to an input signal by using a white noise modeling-based quantization process, computing a total loss for training a neural network-based audio codec, based on the input signal, the reconstruction signal, and the quantized latent vector, training the neural network-based audio codec by using the total loss, and validating the trained neural network-based audio codec to select the best neural network-based audio codec.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: February 11, 2025
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, YONSEI UNIVERSITY WONJU INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Jongmo Sung, Seung Kwon Beack, Tae Jin Lee, Woo-taek Lim, Inseon Jang, Byeongho Cho, Young Cheol Park, Joon Byun, Seungmin Shin
  • Patent number: 12178145
    Abstract: Disclosed semiconductor devices include a substrate, a device pattern structure disposed over the substrate, and a heat insulating layer disposed on the device pattern structure. The device pattern structure includes metal-organic frameworks.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: December 24, 2024
    Assignee: SK hynix Inc.
    Inventors: Woo Cheol Lee, Won Tae Koo
  • Publication number: 20240224534
    Abstract: A ferroelectric memory device includes a substrate, a gate structure disposed over the substrate. The gate structure includes a plurality of gate electrode layers spaced apart from each other along a first direction substantially perpendicular to a surface of the substrate. The ferroelectric memory device includes a first electrode pillar and a second electrode pillar that extend along the first direction and are disposed to be spaced apart from each other in a second direction substantially parallel to the surface of the substrate inside a hole penetrating the gate structure, and a device isolation structure disposed to cross the first and second electrode pillars and to separate the gate structure over the substrate. The gate structure further includes a plurality of ferroelectric layers and a plurality of channel layers which are disposed to correspond to the plurality of gate electrode layers.
    Type: Application
    Filed: June 7, 2023
    Publication date: July 4, 2024
    Inventor: Woo Cheol LEE
  • Patent number: 12001820
    Abstract: Disclosed are an electronic apparatus capable of applying the design of a UI component based on the device's usage environment and the operating method thereof. The present invention presents an electronic apparatus capable of dynamically changing and applying the design of a UI component configuring an application according to a usage environment of an electronic apparatus which drives the application and the operating method thereof to provide an appropriate UI design according to the device's usage environment of a user to the user.
    Type: Grant
    Filed: August 22, 2023
    Date of Patent: June 4, 2024
    Assignee: TOBESOFT CO., LTD.
    Inventors: JeongBeom Park, Songi Park, Woo cheol Lee, Jea Il Kim
  • Publication number: 20240177142
    Abstract: The present disclosure relates to a mobile gift certificate transaction method applying NFT technology. The method includes NFT-tokenizing a gift certificate code stored in a gift certificate storage unit; receiving a buying signal of a gift certificate from a gift certificate buyer terminal; updating an NFT-tokenized gift certificate code corresponding to the received buying signal; transmitting an access address of the NFT-tokenized gift certificate code corresponding to the received buying signal to a gift certificate receiving terminal; receiving a closure request to close the access address of the gift certificate code from the gift certificate receiving terminal when the gift certificate receiving terminal rejects receiving the gift certificate; and restoring the updated NFT-tokenized gift certificate code, in response to receiving the closure request.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Applicant: TWOUZ Inc.
    Inventors: Hanjik RYU, Woo-Cheol LEE, Myoung-Gyun KANG
  • Publication number: 20240118874
    Abstract: Disclosed are an electronic apparatus capable of applying the design of a UI component based on the device's usage environment and the operating method thereof. The present invention presents an electronic apparatus capable of dynamically changing and applying the design of a UI component configuring an application according to a usage environment of an electronic apparatus which drives the application and the operating method thereof to provide an appropriate UI design according to the device's usage environment of a user to the user.
    Type: Application
    Filed: August 22, 2023
    Publication date: April 11, 2024
    Applicant: TOBESOFT CO., LTD.
    Inventors: JeongBeom PARK, Songi PARK, Woo cheol LEE, Jea Il KIM
  • Publication number: 20240078095
    Abstract: Disclosed is technology that recommends an appropriate design template to each component constituting the UI to a UI developer by considering the platform related to an industrial classification of a UI to be developed by the UI developer, a job of a user who is to use the UI, and a target product to which the UI is to be applied to support the UI developer to more easily develop a UI in a direction desired by the UI developer.
    Type: Application
    Filed: July 14, 2023
    Publication date: March 7, 2024
    Applicant: TOBESOFT CO., LTD.
    Inventors: JeongBeom PARK, Songi PARK, woo cheol LEE, Jea Il KIM
  • Publication number: 20240032302
    Abstract: A non-volatile memory device includes: a substrate; a gate structure including a plurality of gate electrode layers and a plurality of interlayer insulating layers, which are alternately stacked in a vertical direction on the substrate, the gate structure including a hole pattern; a data storage layer disposed inside the hole pattern; and a channel layer disposed on the data storage layer inside the hole pattern. The channel layer is disposed at each of different levels isolated from each other in the vertical direction by the plurality of interlayer insulating layers.
    Type: Application
    Filed: December 23, 2022
    Publication date: January 25, 2024
    Applicant: SK hynix Inc.
    Inventors: Woo Cheol LEE, Mi R IM
  • Publication number: 20230301208
    Abstract: Disclosed semiconductor devices include a substrate, a device pattern structure disposed over the substrate, and a heat insulating layer disposed on the device pattern structure. The device pattern structure includes metal-organic frameworks.
    Type: Application
    Filed: August 24, 2022
    Publication date: September 21, 2023
    Inventors: Won Tae KOO, Woo Cheol LEE
  • Publication number: 20230292636
    Abstract: A semiconductor device according to an embodiment of the present disclosure includes a first electrode, a first resistance change layer disposed on the first electrode, a conduction control layer disposed on the first resistance change layer, a second resistance change layer disposed on the conduction control layer, and a second electrode disposed on the second resistance change layer. The conduction control layer includes a metal-organic framework layer and metal particles embedded in the metal-organic framework layer.
    Type: Application
    Filed: August 4, 2022
    Publication date: September 14, 2023
    Inventors: Woo Cheol LEE, Won Tae KOO
  • Publication number: 20230292532
    Abstract: A semiconductor device according to an embodiment of the present disclosure includes a substrate, a gate electrode layer disposed over the substrate, a gate dielectric layer disposed on the gate electrode layer, a channel electrode layer disposed on the gate dielectric layer, a threshold switching layer disposed on the channel electrode layer, and a source electrode layer and a drain electrode layer that are disposed on the threshold switching layer to be spaced apart from each other.
    Type: Application
    Filed: July 27, 2022
    Publication date: September 14, 2023
    Inventor: Woo Cheol LEE
  • Patent number: 10127051
    Abstract: An electronic device includes a first processor; and a second processor; and a third processor. The second processor is configured to detect an event, select one of the first and third processors to perform one or more operations associated with the event, and cause the selected processor to perform the one or more operations.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: November 13, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Cheol Lee, Jin-Woo Roh, Moo-Young Kim, Dong-Wook Suh
  • Patent number: 10116520
    Abstract: According to an exemplary embodiment of the present disclosure, a method of generating a network-on-chip (NoC) in an electronic device includes clustering a plurality of cores based on total communication energy comprising first communication energy between a plurality of voltage-frequency-islands (VFIs) and second communication energy inside the plurality of VFIs.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: October 30, 2018
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Woo-Cheol Lee, Chang Lin Li, Tae Hee Han, Jinwoo Roh, Dongwook Suh
  • Publication number: 20160269321
    Abstract: According to an exemplary embodiment of the present disclosure, a method of generating a network-on-chip (NoC) in an electronic device includes clustering a plurality of cores based on total communication energy comprising first communication energy between a plurality of voltage-frequency-islands (VFIs) and second communication energy inside the plurality of VFIs.
    Type: Application
    Filed: March 11, 2016
    Publication date: September 15, 2016
    Inventors: Woo-Cheol Lee, Chang Lin Li, Tae Hee Han, Jinwoo Roh, Dongwook Suh
  • Publication number: 20160132369
    Abstract: An electronic device includes a first processor; and a second processor; and a third processor. The second processor is configured to detect an event, select one of the first and third processors to perform one or more operations associated with the event, and cause the selected processor to perform the one or more operations.
    Type: Application
    Filed: November 6, 2015
    Publication date: May 12, 2016
    Inventors: Woo-Cheol LEE, Jin-Woo ROH, Moo-Young KIM, Dong-Wook SUH
  • Patent number: 9312478
    Abstract: Magnetic devices, and methods of manufacturing the same, include a stack structure including at least one magnetic layer, etched using an etching gas including at least 70 volume percent of a hydrogen-containing gas and at least 2 volume percent of CO gas.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: April 12, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hak-sun Lee, Tokashiki Ken, Myeong-cheol Kim, Hyung-joon Kwon, Sang-min Lee, Woo-cheol Lee, Myung-hoon Jung
  • Patent number: 9293343
    Abstract: A method of forming patterns of a semiconductor device includes forming a material film on a substrate, forming a hard mask on the material film, forming a first mold mask pattern and a second mold mask pattern on the hard mask, forming a pair of first spacers to cover opposite sidewalls of the first mold mask pattern, and a pair of second spacers to cover opposite sidewalls of the second mold mask pattern, forming a first gap and a second gap to expose the hard mask by removing the first mold mask pattern and the second mold mask pattern, the first gap being formed between the pair of first spacers and the second gap being formed between the pair of second spacers, forming a mask pattern on the hard mask to cover the first gap and expose the second gap, forming an auxiliary pattern to cover the second gap, removing the mask pattern; and forming a hard mask pattern by patterning the hard mask using the first spacers, the second spacers and the auxiliary pattern as a mask.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: March 22, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Do-Haing Lee, Il-Sup Kim, Do-Hyoung Kim, Woo-Cheol Lee, Hyun-Ho Jung
  • Patent number: 9247336
    Abstract: An apparatus and method for confirming control information that is input through an earphone in a portable terminal are provided. The apparatus includes an interface to which an earphone connects, and a controller for creating bit information dependent on a key input provided from the earphone connected through the interface, and confirming control information corresponding to the bit information.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: January 26, 2016
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Woo-Cheol Lee, Hyo-Jin Kim