Patents by Inventor Woo-Hee Kim

Woo-Hee Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973209
    Abstract: A positive electrode active material for a secondary battery includes a lithium composite transition metal oxide including nickel (Ni), cobalt (Co), and manganese (Mn), wherein the lithium composite transition metal oxide has a layered crystal structure of space group R3m, includes the nickel (Ni) in an amount of 60 mol % or less based on a total amount of transition metals, includes the cobalt (Co) in an amount greater than an amount of the manganese (Mn), and is composed of single particles.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: April 30, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Eun Hee Lee, Seong Bae Kim, Young Su Park, Yi Rang Lim, Hong Kyu Park, Song Yi Yang, Byung Hyun Hwang, Woo Hyun Kim
  • Publication number: 20240117461
    Abstract: Proposed is a solvent extraction method using two-stage extraction for separation and recovery of nickel, cobalt, and manganese. More specifically, the method relates to a two-stage extraction-based solvent extraction method for separately recovering nickel, cobalt, and manganese from a starting material containing nickel, cobalt, and manganese. The method includes a first solvent extraction step in which manganese is recovered from the starting material and a second solvent extraction step in which nickel and cobalt are extracted from the starting material so that three kinds of valuable metals can be separately recovered.
    Type: Application
    Filed: February 28, 2022
    Publication date: April 11, 2024
    Inventors: Dong Hee KIM, Yong Hun KIM, Woo Jin KIM
  • Publication number: 20240117460
    Abstract: The present disclosure relates to a hydrometallurgical recovery method for nickel sulfate. More specifically, the present disclosure relates to a hydrometallurgical nickel sulfate recovery method in which a wet smelting process is used to extract a high-purity nickel sulfate aqueous solution from a raw material containing nickel (Ni), cobalt (Co), and manganese (Mn). In the method, sodium hydroxide or sodium carbonate is not used as a neutralizer but nickel hydroxide is used, which prevents salts of impurities from being generated as a precipitate in a solvent extraction process, thereby increasing process efficiency of the solvent extraction process.
    Type: Application
    Filed: January 7, 2022
    Publication date: April 11, 2024
    Inventors: Dong Hee KIM, Yong Hun KIM, Woo Jin KIM
  • Publication number: 20240117463
    Abstract: Disclosed is a solvent extraction method for separation and recovery of nickel, cobalt, and manganese. More particularly, the solvent extraction method for recovery of nickel, cobalt, and manganese uses a starting material containing nickel (Ni), cobalt (Co), and manganese (Mn) is used. In the method, manganese (Mn) is recovered through a first solvent extraction step, nickel (Ni) is recovered through a second solvent extraction step, and cobalt (Co) is recovered through a third solvent extraction step. The three kinds of valuable metals are separately separated and recovered.
    Type: Application
    Filed: April 12, 2022
    Publication date: April 11, 2024
    Inventors: Dong Hee KIM, Yong Hun KIM, Woo Jin KIM
  • Publication number: 20240117466
    Abstract: Proposed is a method of selectively leaching lithium (Li) and aluminum (Al) from a mixed carbonate precipitate (MCP) and, more specifically, a method of selectively leaching Li and Al from an MCP, by which a high-purity MCP can be prepared through selective leaching of Li and Al contained in an MCP used as a raw material for recovering valuable metals including nickel (Ni), cobalt (Co), and manganese (Mn).
    Type: Application
    Filed: January 26, 2022
    Publication date: April 11, 2024
    Inventors: Dong Hee KIM, Woo Jin KIM, Se Il SON
  • Publication number: 20240112949
    Abstract: A semiconductor device including a first interlayer insulating film; a conductive pattern in the first interlayer insulating film; a resistance pattern on the conductive pattern; an upper etching stopper film spaced apart from the resistance pattern, extending in parallel with a top surface of the resistance pattern, and including a first metal; a lower etching stopper film on the conductive pattern, extending in parallel with a top surface of the first interlayer insulating film, and including a second metal; and a second interlayer insulating film on the upper etching stopper film and the lower etching stopper film, wherein a distance from a top surface of the second interlayer insulating film to a top surface of the upper etching stopper film is smaller than a distance from the top surface of the second interlayer insulating film to a top surface of the lower etching stopper film.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventors: Sung Jin KANG, Jong Min BAEK, Woo Kyung YOU, Kyu-Hee HAN, Han Seong KIM, Jang Ho LEE, Sang Shin JANG
  • Publication number: 20240102128
    Abstract: A solvent extraction method for separation and recovery of nickel, cobalt, manganese, and zinc is proposed. More particularly, the present method relates to a solvent extraction method for separation and recovery of nickel, cobalt, manganese, and zinc, the method being capable of separately recovering four kinds of valuable metals as respective monotype metals from a starting material containing nickel, cobalt, manganese, and zinc by involving: a first solvent extraction step in which the starting material is separated into a first aqueous phase solution containing nickel and cobalt and a second aqueous phase solution containing nickel, cobalt, manganese, and zinc; a second solvent extraction step in which nickel (Ni) and cobalt (Co) are separated and recovered; a third solvent extraction in which zinc (Zn) is recovered; and a fourth solvent extraction step in which manganese (Mn) and cobalt (Co) are separated and recovered.
    Type: Application
    Filed: April 21, 2022
    Publication date: March 28, 2024
    Inventors: Dong Hee KIM, Yong Hun KIM, Woo Jin KIM
  • Publication number: 20240091320
    Abstract: The present invention relates to a peptide with anti-inflammatory activity, wherein the peptide comprises SEQ ID NO: 1, the peptide has above 80% homology of amino acid sequence with above-mentioned sequence, or the peptide is the fragment of the above-mentioned peptides. The present invention also relates to an inflammatory composition comprising the above mentioned peptides. According to the present invention, a peptide comprising a sequence of SEQ ID NO: 1 has an outstanding efficacy in both suppressing inflammation and in prophylactic means. Therefore, the composition comprising the peptide of this invention can be used as anti-inflammatory pharmaceutical composition or as cosmetic composition, in turn, treating and preventing a variety of different types of inflammatory diseases.
    Type: Application
    Filed: August 9, 2023
    Publication date: March 21, 2024
    Inventors: Sang Jae KIM, Kyung Hee KIM, Kyu-Yong LEE, Seong-Ho KOH, Hyun-Hee PARK, Sung Jin HUH, Woo Jin LEE, Bum Joon KIM
  • Patent number: 11932618
    Abstract: Disclosed are novel compounds of Chemical Formula 1, optical isomers of the compounds, and pharmaceutically acceptable salts of the compounds or the optical isomers. The compounds, isomers, and salts exhibit excellent activity as GLP-1 receptor agonists. In particular, they, as GLP-1 receptor agonists, exhibit excellent glucose tolerance, thus having a great potential to be used as therapeutic agents for metabolic diseases. Moreover, they exhibit excellent pharmacological safety for cardiovascular systems.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: March 19, 2024
    Assignee: ILDONG PHARMACEUTICAL CO., LTD.
    Inventors: Hong Chul Yoon, Kyung Mi An, Myong Jae Lee, Jin Hee Lee, Jeong-geun Kim, A-rang Im, Woo Jin Jeon, Jin Ah Jeong, Jaeho Heo, Changhee Hong, Kyeojin Kim, Jung-Eun Park, Te-ik Sohn, Changmok Oh, Da Hae Hong, Sung Wook Kwon, Jung Ho Kim, Jae Eui Shin, Yeongran Yoo, Min Whan Chang, Eun Hye Jang, In-gyu Je, Ji Hye Choi, Gunhee Kim, Yearin Jun
  • Publication number: 20240071262
    Abstract: An electronic price indicator according to an embodiment includes a display displaying product information, an NFC module configured to communicate with a user terminal, a Bluetooth module configured to communicate with the user terminal, and a processor configured to control the display to display the product information received from the user terminal through the Bluetooth module. The processor is further configured to release a sleep mode when receiving an interrupt from the user terminal through the NFC module, and perform Bluetooth communication with the user terminal by initiating a scan for a predetermined period of time to receive an advertising signal from the user terminal.
    Type: Application
    Filed: January 20, 2023
    Publication date: February 29, 2024
    Inventors: Jae Gun HEO, Chung Hee LEE, Do Sang KWON, Woo Seok HAN, Chan LEE, Ji Hoon KIM, Bo II SEO
  • Patent number: 11834742
    Abstract: A deposition method may include: providing a structure to be deposited that includes a silicon oxide area and a silicon nitride area having different surface characteristics from each other; and performing an atomic layer deposition (ALD) process in a reactor provided with the structure to selectively form a silicon oxide layer on the silicon oxide portion between the silicon oxide portion and the silicon nitride portion. The ALD process may include: supplying a silicon precursor into the reactor to selectively adsorb the silicon precursor to a surface of the silicon oxide portion; purging the reactor; supplying an inhibitor material into the reactor to selectively adsorb the inhibitor material to a surface of the silicon nitride portion; purging the reactor; supplying an oxygen-containing source into the reactor; and purging the reactor.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: December 5, 2023
    Assignees: SK hynix Inc., Industry-University Cooperation Foundation Hanyang University ERICA Campus
    Inventors: Woo-Hee Kim, Jinseon Lee, Jeong-Min Lee, Daehyun Kim, Changhan Kim
  • Publication number: 20220243330
    Abstract: A deposition method may include: providing a structure to be deposited that includes a silicon oxide area and a silicon nitride area having different surface characteristics from each other; and performing an atomic layer deposition (ALD) process in a reactor provided with the structure to selectively form a silicon oxide layer on the silicon oxide portion between the silicon oxide portion and the silicon nitride portion. The ALD process may include: supplying a silicon precursor into the reactor to selectively adsorb the silicon precursor to a surface of the silicon oxide portion; purging the reactor; supplying an inhibitor material into the reactor to selectively adsorb the inhibitor material to a surface of the silicon nitride portion; purging the reactor; supplying an oxygen-containing source into the reactor; and purging the reactor.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 4, 2022
    Inventors: Woo-Hee KIM, Jinseon LEE, Jeong-Min LEE, Daehyun KIM, Changhan KIM
  • Publication number: 20220235461
    Abstract: An area-selective deposition method may include providing a substrate structure including a silicon oxide area and a silicon nitride area; performing a surface treatment on the silicon oxide area and the silicon nitride area of the substrate structure to form a first functional group on a surface of the silicon oxide area and to form a second functional group on a surface of the silicon nitride area; and performing an atomic layer deposition (ALD) process in a chamber in which the substrate structure is disposed, to selectively form a silicon oxide layer on the silicon oxide area among the silicon nitride area and the silicon oxide area. The ALD process may include: supplying an aminosilane-based silicon precursor into the chamber; purging the chamber with a first purge gas; supplying an oxygen-containing source into the chamber; and purging the chamber with a second purge gas.
    Type: Application
    Filed: January 25, 2022
    Publication date: July 28, 2022
    Inventors: Woo-Hee KIM, Jinseon LEE, Daehyun KIM, Changhan KIM
  • Patent number: 9640443
    Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate insulating layers are on the first through fourth areas, respectively. Amounts of work function control materials in the first through fourth gate insulating layers, nitrogen concentrations in the first through fourth gate insulating layers, and/or thicknesses of the first through fourth gate insulating layers vary among the first through fourth gate insulating layers. Methods for fabricating semiconductor devices are also provided.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: May 2, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kug-Hwan Kim, Jong-Ho Lee, Woo-Hee Kim, Nae-In Lee
  • Publication number: 20160276225
    Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate insulating layers are on the first through fourth areas, respectively. Amounts of work function control materials in the first through fourth gate insulating layers, nitrogen concentrations in the first through fourth gate insulating layers, and/or thicknesses of the first through fourth gate insulating layers vary among the first through fourth gate insulating layers. Methods for fabricating semiconductor devices are also provided.
    Type: Application
    Filed: May 13, 2016
    Publication date: September 22, 2016
    Inventors: Kug-Hwan Kim, Jong-Ho Lee, Woo-Hee Kim, Nae-In Lee
  • Patent number: 9177865
    Abstract: Provided are methods for fabricating a semiconductor device. A gate dielectric layer is formed on a substrate including first through third regions. A first functional layer is formed on only the first region of the first through third regions. A second functional layer is formed on only the first and second regions of the first through third regions. A threshold voltage adjustment layer is formed on the first through third regions. The threshold voltage adjustment layer includes a work function adjustment material. The work function adjustment material is diffused into the gate dielectric layer by performing a heat treatment process with respect to the substrate.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: November 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-Hee Kim, Nae-In Lee, Kug-Hwan Kim, Jong-Ho Lee
  • Publication number: 20150187763
    Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate insulating layers are on the first through fourth areas, respectively. Amounts of work function control materials in the first through fourth gate insulating layers, nitrogen concentrations in the first through fourth gate insulating layers, and/or thicknesses of the first through fourth gate insulating layers vary among the first through fourth gate insulating layers. Methods for fabricating semiconductor devices are also provided.
    Type: Application
    Filed: September 18, 2014
    Publication date: July 2, 2015
    Inventors: Kug-Hwan Kim, Jong-Ho Lee, Woo-Hee Kim, Nae-In Lee
  • Patent number: 8927438
    Abstract: Provided are methods for depositing a cerium doped hafnium containing high-k dielectric film on a substrate. The reagents of specific methods include hafnium tetrachloride, an organometallic complex of cerium and water.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: January 6, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Hyungjun Kim, Woo-Hee Kim, Min-Kyu Kim, Steven Hung, Atif Noori, David Thompson, Jeffrey W. Anthis
  • Publication number: 20140363960
    Abstract: Provided are methods for fabricating a semiconductor device. A gate dielectric layer is formed on a substrate including first through third regions. A first functional layer is formed on only the first region of the first through third regions. A second functional layer is formed on only the first and second regions of the first through third regions. A threshold voltage adjustment layer is formed on the first through third regions. The threshold voltage adjustment layer includes a work function adjustment material. The work function adjustment material is diffused into the gate dielectric layer by performing a heat treatment process with respect to the substrate.
    Type: Application
    Filed: May 7, 2014
    Publication date: December 11, 2014
    Inventors: Woo-Hee Kim, Nae-In Lee, Kug-Hwan Kim, Jong-Ho Lee
  • Publication number: 20120270409
    Abstract: Provided are methods for depositing a cerium doped hafnium containing high-k dielectric film on a substrate. The reagents of specific methods include hafnium tetrachloride, an organometallic complex of cerium and water.
    Type: Application
    Filed: April 2, 2012
    Publication date: October 25, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Hyungjun Kim, Woo-Hee Kim, Min-Kyu Kim, Steven Hung, Atif Noori, David Thompson, Jeffrey W. Anthis