Patents by Inventor Woo-Shik Jung
Woo-Shik Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240038158Abstract: An electronic device may include a display and an optical sensor formed underneath the display. The electronic device may include a plurality of transparent windows that overlap the optical sensor. The resolution of the display panel may be reduced in some areas due to the presence of the transparent windows. To prevent a visible border between the reduced resolution areas of the display and full resolution areas of the display, uniformity compensation circuitry may be used to compensate pixel data. The uniformity compensation circuitry may output compensated pixel data for the display using one or more compensation maps that include compensation factors associated with pixel locations. The uniformity compensation circuitry may also use region-specific gamma look-up tables to apply different gamma curves to pixels in different regions of the display. The uniformity compensation circuitry may also be used to form a transition region between different regions of the display.Type: ApplicationFiled: October 4, 2023Publication date: February 1, 2024Inventors: Lingtao Wang, Yingying Tang, Scott R. Johnston, Chaohao Wang, Sheng Zhang, Woo Shik Jung
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Patent number: 11823620Abstract: An electronic device may include a display and an optical sensor formed underneath the display. The electronic device may include a plurality of transparent windows that overlap the optical sensor. The resolution of the display panel may be reduced in some areas due to the presence of the transparent windows. To prevent a visible border between the reduced resolution areas of the display and full resolution areas of the display, uniformity compensation circuitry may be used to compensate pixel data. The uniformity compensation circuitry may output compensated pixel data for the display using one or more compensation maps that include compensation factors associated with pixel locations. The uniformity compensation circuitry may also use region-specific gamma look-up tables to apply different gamma curves to pixels in different regions of the display. The uniformity compensation circuitry may also be used to form a transition region between different regions of the display.Type: GrantFiled: July 6, 2021Date of Patent: November 21, 2023Assignee: Apple Inc.Inventors: Lingtao Wang, Yingying Tang, Scott R. Johnston, Chaohao Wang, Sheng Zhang, Woo Shik Jung
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Publication number: 20230019977Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.Type: ApplicationFiled: March 1, 2022Publication date: January 19, 2023Inventors: Jae Hyung LEE, Yeul NA, Youngsik KIM, Woo-Shik JUNG
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Publication number: 20220165814Abstract: An electronic device may include a display and a sensor under the display. The display may include an array of subpixels for displaying an image to a user of the electronic device. At least a portion of the array of subpixels may be selectively removed in a pixel removal region to improve optical transmittance to the sensor through the display. The pixel removal region may include a plurality of pixel free regions that are devoid of thin-film transistor structures, that are devoid of power supply lines, that have continuous open areas due to rerouted row/column lines, that are partially devoid of touch circuitry, that optionally include dummy contacts, and/or have selectively patterned display layers.Type: ApplicationFiled: April 8, 2020Publication date: May 26, 2022Inventors: Warren S. Rieutort-Louis, Woo Shik Jung, Abbas Jamshidi Roudbari, Shin-Hung Yeh, Christopher E. Glazowski, Jean-Pierre S. Guillou, Yuchi Che
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Patent number: 11264418Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.Type: GrantFiled: October 22, 2018Date of Patent: March 1, 2022Assignee: Stratio Inc.Inventors: Jae Hyung Lee, Yeul Na, Youngsik Kim, Woo-Shik Jung
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Patent number: 11217211Abstract: Techniques for implementing and/or operating an electronic device that includes a display panel, which displays an image and includes a first panel section implemented with a lower pixel resolution and a second panel section implemented with a higher pixel resolution, an optical sensor disposed behind the first panel section of the display panel, and image processing circuitry communicatively coupled to the display panel. The image processing circuitry receives source image data corresponding with the image, in which the source image data is indicative of target luminance of a display pixel, determines a pixel resolution surrounding the display pixel, processes the source image based at least in part on the pixel resolution surrounding the display pixel to facilitate determining display image data corresponding with the display pixel, and outputs the display image data to enable the display panel to display the image based on the display image data.Type: GrantFiled: July 14, 2020Date of Patent: January 4, 2022Assignee: Apple Inc.Inventors: Yingying Tang, Chaohao Wang, Wei H. Yao, Christopher E. Glazowski, Woo Shik Jung, Scott R. Johnston
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Publication number: 20210027751Abstract: Techniques for implementing and/or operating an electronic device that includes a display panel, which displays an image and includes a first panel section implemented with a lower pixel resolution and a second panel section implemented with a higher pixel resolution, an optical sensor disposed behind the first panel section of the display panel, and image processing circuitry communicatively coupled to the display panel. The image processing circuitry receives source image data corresponding with the image, in which the source image data is indicative of target luminance of a display pixel, determines a pixel resolution surrounding the display pixel, processes the source image based at least in part on the pixel resolution surrounding the display pixel to facilitate determining display image data corresponding with the display pixel, and outputs the display image data to enable the display panel to display the image based on the display image data.Type: ApplicationFiled: July 14, 2020Publication date: January 28, 2021Inventors: Yingying Tang, Chaohao Wang, Wei H. Yao, Christopher E. Glazowski, Woo Shik Jung, Scott R. Johnston
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Patent number: 10600640Abstract: Methods for reducing surface roughness of germanium are described herein. In some embodiments, the surface roughness is reduced by thermal oxidation of germanium. In some embodiments, the surface roughness is further reduced by controlling a rate of the thermal oxidation. In some embodiments, the surface roughness is reduced by thermal annealing.Type: GrantFiled: June 15, 2017Date of Patent: March 24, 2020Assignee: Stratio, Inc.Inventors: Woo-Shik Jung, Yeul Na, Youngsik Kim, Jae Hyung Lee, Jin Hyung Lee
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Publication number: 20190221595Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.Type: ApplicationFiled: October 22, 2018Publication date: July 18, 2019Inventors: Jae Hyung LEE, Yeul NA, Youngsik KIM, Woo-Shik JUNG
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Patent number: 10109662Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.Type: GrantFiled: December 11, 2015Date of Patent: October 23, 2018Assignee: Stratio, Inc.Inventors: Jae Hyung Lee, Yeul Na, Youngsik Kim, Woo-Shik Jung
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Publication number: 20170287706Abstract: Methods for reducing surface roughness of germanium are described herein. In some embodiments, the surface roughness is reduced by thermal oxidation of germanium. In some embodiments, the surface roughness is further reduced by controlling a rate of the thermal oxidation. In some embodiments, the surface roughness is reduced by thermal annealing.Type: ApplicationFiled: June 15, 2017Publication date: October 5, 2017Inventors: Woo-Shik Jung, Yeul Na, Youngsik Kim, Jae Hyung Lee, Jin Hyung Lee
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Patent number: 9378950Abstract: A method for removing nuclei formed during a selective epitaxial growth process includes epitaxially growing a first group of one or more semiconductor structures over a substrate with one or more mask layers. A second group of a plurality of semiconductor structures is formed on the one or more mask layers. The method also includes forming one or more protective layers over the first group of one or more semiconductor structures. At least a subset of the second group of the plurality of semiconductor structures is exposed from the one or more protective layers. The method further includes, subsequent to forming the one or more protective layers over the first group of one or more semiconductor structures, etching at least the subset of the second group of the plurality of semiconductor structures.Type: GrantFiled: February 23, 2016Date of Patent: June 28, 2016Assignees: STRATIO, STRATIO INC.Inventors: Jae Hyung Lee, Youngsik Kim, Yeul Na, Woo-Shik Jung
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Publication number: 20160099372Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.Type: ApplicationFiled: December 11, 2015Publication date: April 7, 2016Inventors: Jae Hyung Lee, Yeul Na, Youngsik Kim, Woo-Shik Jung
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Publication number: 20150228824Abstract: Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.Type: ApplicationFiled: April 20, 2015Publication date: August 13, 2015Inventors: AUGUSTIN J. HONG, WOO-SHIK JUNG, JEEHWAN KIM, JAE-WOONG NAH, DEVENDRA K. SADANA
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Patent number: 9040428Abstract: Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.Type: GrantFiled: September 7, 2012Date of Patent: May 26, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Augustin J. Hong, Woo-Shik Jung, Jeehwan Kim, Jae-Woong Nahum, Devendra K. Sadana
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Publication number: 20140308801Abstract: Bonding of one or more semiconductor layers to a glass substrate is facilitated by depositing spin-on-glass (SOG) on the top of the semiconductor layers. The SOG is then bonded to the glass substrate, and after that, the original substrate of the semiconductor layers is removed. The resulting structure has the semiconductor layers disposed on the glass substrate with a layer of SOG sandwiched between. Bonding is always between glass and glass, and is independent of the composition of the target layers. Thus, it can provide “anything on glass”. For example, X-on-insulator (XOI), where X can be silicon, germanium, GaAs, GaN, SiC, graphene, etc. The spin-on-glass also helps with the surface roughness requirement.Type: ApplicationFiled: April 11, 2014Publication date: October 16, 2014Applicant: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Jae Hyung Lee, Woo Shik Jung, Krishna C. Saraswat
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Patent number: 8685858Abstract: Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.Type: GrantFiled: August 30, 2011Date of Patent: April 1, 2014Assignee: International Business Machines CorporationInventors: Augustin J. Hong, Woo-Shik Jung, Jeehwan Kim, Jae-Woong Nah, Devendra K. Sadana
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Publication number: 20130049158Abstract: Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.Type: ApplicationFiled: August 30, 2011Publication date: February 28, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Augustin J. Hong, Woo-Shik Jung, Jeehwan Kim, Jae-woong Nah, Devendra K. Sadana
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Publication number: 20130049150Abstract: Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications.Type: ApplicationFiled: September 7, 2012Publication date: February 28, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Augustin J. Hong, Woo-Shik Jung, Jeehwan Kim, Jae-Woong Nah, Devendra K. Sadana