Abstract: In a CDMA (code division multiple access) digital receiver and an automatic gain control method thereof, when an RF-processed CDMA analog IF (intermediate frequency) signal is inputted, the analog IF signal is converted into a digital IF signal. The digital IF signal is then digital-demodulated, and a digital-demodulated base band signal is clipped so as to have a level of a digital base band signal preset in a CDMA system. Accordingly it is possible to perform a digital demodulation in a CDMA receiver. In addition, it is possible to perform the same automatic gain control as a CDMA analog receiver by receiving the same input signal (analog IF signal) as the CDMA analog receiver. As a result, the performance of a CDMA receiver is significantly improved.

Abstract: A semiconductor device having a chamfered silicide layer and a manufacturing method of the same. The semiconductor device includes: a first insulation layer overlying a semiconductor substrate; gate structures including first conductive layer patterns formed on the first insulation layer, and second conductive layer patterns which are formed on the first conductive layer patterns, wherein the lower sides of the second conductive layer patterns are substantially perpendicular to the major surface of the semiconductor substrate and the upper sides of the second conductive layer patterns are chamfered; and a second insulation layer formed with a first width W on the second conductive layer patterns, wherein the sidewalls of the second insulation layer overhang the upper edges of the second conductive layer patterns.

Abstract: A method of forming a CMOS type semiconductor device having dual gate includes forming a first gate insulation layer and a first metal-containing layer sequentially on a surface of a substrate in first and second impurity type transistor regions, removing the first metal-containing layer and the first gate insulation layer in the second impurity type transistor region, forming a second gate insulation layer and a second metal-containing layer in the second impurity type transistor region, and forming first and second electrodes in the first and second impurity type transistor regions, respectively, by patterning the first and second metal-containing layers.

Abstract: A semiconductor device having a chamfered silicide layer and a manufacturing method of the same. The semiconductor device includes: a first insulation layer overlying a semiconductor substrate; gate structures including first conductive layer patterns formed on the first insulation layer, and second conductive layer patterns which are formed on the first conductive layer patterns, wherein the lower sides of the second conductive layer patterns are substantially perpendicular to the major surface of the semiconductor substrate and the upper sides of the second conductive layer patterns are chamfered; and a second insulation layer formed with a first width W on the second conductive layer patterns, wherein the sidewalls of the second insulation layer overhang the upper edges of the second conductive layer patterns.

Abstract: A transmission power detecting apparatus of a CDMA system is disclosed by which since the power detection of the RF CDMA signal is digitally performed and no RF device (an RSSI detector) which is sensitive to a temperature change is used, a power of the RF CDMA signal can be more accurately detected. In addition, since an IF analog CDMA signal to be measure is sampled and then an average power of the sampled digital IF CDMA signal is obtained, accuracy in power detection and transmission power adjustment can be accomplished. Moreover, since the power of the baseband digital CDMA signal containing a traffic is detected to provide a reference value for adjusting the power of the RF CDMA signal, an error generated in determining a power of the RF CDMA signal as in the conventional art can be reduced.

Abstract: According to a digital linearizing method, a digital input signal on a first path is operated with an output signal of a main amplifying unit, to thus detect distortion components included in the output signal of the main amplifying unit. A digital input signal on a second path is correlated with the detected distortion components, to thus adaptively control a gain of the digital input signal on the second path during the detection of the distortion components. Therefore, according to the above method, it is possible to effectively and correctly remove the distortion components included in the output signal of the main amplifying unit by amplifying the detected distortion components and coupling the amplified distortion components with the output signal of the main amplifying unit.

Abstract: A signal transmitting apparatus for an optical base station is disclosed. According to the invention, a base station outputs a digital IQ signal to an optical connecting unit. The optical connecting unit processes the digital IQ signal digitally, and transmits the digital signal over an optical network to a remotely located optical base station. The remote station digitally processes the signal before converting to an RF signal for transmission. The invention advantageously decreases signal loss and noise associated with analog processing in the optical connecting units and remote stations in the related art. System reliability is also improved.

Abstract: A base station transmitter having a digital predistorter and predistortion method is disclosed. The predistortion is accomplished by delaying a digital input signal, predistorted by a predistortion unit, for a predetermined time. A coefficient of a non-linear characteristic model of a power amplifier is generated using a digital output signal, converted from an amplified output signal of the power amplifier, and the delayed digital input signal. A reference signal is randomly generated to produce a predistortion model having a characteristic opposite to the non-linear characteristic of the power amplifier. A predistortion error function is extracted by subtracting the reference signal and the non-linear characteristic model of the power amplifier, after the produced coefficient is applied to the model. A coefficient of the predistortion unit is controlled adaptively using the predistortion error function.

Abstract: An improved method for mounting tape carrier package type integrated circuits on printed circuit boards. In the method, some of leads of the integrated circuit are preliminarily soldered with corresponding lead pattern on the printed circuit board after the integrated circuit is aligned on the printed circuit board so that the integrated circuit is prevented from being disordered while the printed circuit board including the integrated circuit aligned thereon is transferred to a soldering apparatus.

Abstract: A method for forming a contact plug formed of polysilicon and a method for manufacturing a semiconductor device using the same are provided. The contact plug is formed by etching back polysilicon which fills a contact hole and is deposited on an interlayer dielectric film using a gas mixture of SF6, CHF3, and CF4, thus planarizing the polysilicon. Also, the contact plug can be made protrude above the interlayer dielectric film by etching the entire surface of the exposed interlayer dielectric film around the polysilicon contact plug formed by etching back the polysilicon. According to the present invention, the degree of planarization of the polysilicon contact plug is improved by etching back the polysilicon using the gas mixture of SF6, CHF3, and CF4.

Abstract: A method for mounting an integrated circuit having a plurality of leads on a PCB. In order to mount the integrated circuit having a plurality of leads on the PCB, foreign substance on the PCB is first removed and a flux is simultaneously spread over the lead patterns formed on the PCB. After that, by aligning the leads of the integrated circuit with lead patterns on the PCB on which the flux is spread, some leads of the integrated circuit is temporarily fixed to the corresponding lead patterns of the PCB. After soldering the leads of the integrated circuit to the lead patterns of the PCB by radiating an optical beam on the entire whole surface, the soldered PCB is cooled, thereby mounting the integrated circuit on the PCB.

Abstract: Any one of at least two holding blocks loaded in a holding block storing portion is picked up and moved to cover an IC on a PCB of a PCB array. A light beam is applied to the whole surface of the PCB. The holding block is moved from the PCB to the holding block storing portion and cooled. It is then determined whether any other PCB to be soldered exists in the PCB array. If it is determined that any other PCB to be soldered exists in the PCB array, another holding block is picked up from the holding block storing portion and moved to cover an IC on the PCB of the PCB array. The above steps are repeated until all the PCBs of the PCB array to be soldered are completely soldered. If it is determined that any other PCB to be soldered does not exist in the PCB array, the PCB array is transferred to a subsequent process.

Abstract: A method of mounting an integrated circuit having a plurality of leads on a printed circuit board (PCB), by: removing foreign substances on the PCB; spreading a flux on lead patterns formed on the PCB; aligning the leads of the integrated circuit on the lead patterns on the PCB on which the flux is spread; soldering the leads and lead patterns by covering the part of a semiconductor chip of the aligned integrated circuit using a holding block and radiating an optical beam onto the whole surface thereof; and cooling the holding block and PCB which has been soldered, which prevents shorts and a poor contact generated by an earlier method. As the quality of soldering is enhanced and the lead is not pressured when soldering, the confidence of the integrated circuit after mounting is also enhanced. Moreover, by soldering all of the leads at one time, the operational time can be reduced.

Abstract: A rock fragmentation system using Gold Schmidt method and process for blasting using the machine are provided, wherein the blasting machine has a capacitor bank, a switch, a high voltage electric power supply, a first charge dump and a second charge dump, and an electrode assembly which is connected to capacitor bank and switch with a coxial cable and electrodes at a lower end of the electrode assembly, wherein an aluminum and metal oxide composition of a predetermined mixture ratio is inserted between electrodes in a lower end of the electrode assembly for generating an instant reaction energy by discharging the electric energy.