Patents by Inventor WooTae LEE

WooTae LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9324944
    Abstract: A selection device, non-volatile memory cell, and method of fabricating the same. The selection device employs an oxide laminate structure including a tunneling oxide layer and a metal-cluster oxide layer between first and second electrodes, enabling a high selection ratio and sufficient on-current density to allow program data recordation in a memory cell at relatively low voltage. The non-volatile memory cell includes the selection device electrically connected to a resistive random access memory device, including a resistance change layer, enabling suppression of current leakage from a non-selected adjacent memory cell in an array structure. In the method of fabrication, a tunneling oxide layer is formed by depositing and oxidizing a metal layer to control oxygen vacancy density in the metal-cluster oxide layer, and an interface oxide layer is formed in the tunneling oxide layer by doping of metal-clusters in the metal-cluster oxide layer, improving on-current density of the selection device.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: April 26, 2016
    Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hyunsang Hwang, WooTae Lee
  • Publication number: 20130264534
    Abstract: A selection device, non-volatile memory cell, and method of fabricating the same. The selection device employs an oxide laminate structure including a tunneling oxide layer and a metal-cluster oxide layer between first and second electrodes, enabling a high selection ratio and sufficient on-current density to allow program data recordation in a memory cell at relatively low voltage. The non-volatile memory cell includes the selection device electrically connected to a resistive random access memory device, including a resistance change layer, enabling suppression of current leakage from a non-selected adjacent memory cell in an array structure. In the method of fabrication, a tunneling oxide layer is formed by depositing and oxidizing a metal layer to control oxygen vacancy density in the metal-cluster oxide layer, and an interface oxide layer is formed in the tunneling oxide layer by doping of metal-clusters in the metal-cluster oxide layer, improving on-current density of the selection device.
    Type: Application
    Filed: April 4, 2013
    Publication date: October 10, 2013
    Applicant: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hyunsang HWANG, WooTae LEE