Patents by Inventor Woo Chul Jeon

Woo Chul Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12080358
    Abstract: A nonvolatile memory device including a memory cell array, a first voltage generator configured to generate a word line operating voltage for each word line of the memory cell array, a second voltage generator configured to generate a bit line operating voltage of the memory cell array, and a temperature unit configured to determine, from a temperature range table, a temperature range for a temperature code according to a real-time temperature of the memory cell array, and to adjust a power supply voltage of the first or second voltage generator based on a selection signal mapped to the determined temperature range.
    Type: Grant
    Filed: July 18, 2022
    Date of Patent: September 3, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bong-Kil Jung, Sang-Wan Nam, Jong Min Baek, Min Ki Jeon, Woo Chul Jung, Yoon-Hee Choi
  • Patent number: 9570597
    Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer that induces a two-dimensional electron gas (2DEG) in a channel layer, a source electrode and a drain electrode that are at sides of the channel supply layer, a depletion-forming layer that is on the channel supply layer and contacts the source electrode, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulating layer. The depletion-forming layer forms a depletion region in the 2DEG.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: February 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Jong-seob Kim, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Jong-bong Ha, Sun-kyu Hwang
  • Patent number: 9461637
    Abstract: According to example embodiments, a method for controlling a gate voltage applied to a gate electrode of a high electron mobility transistor (HEMT) may include measuring a voltage between a drain electrode and a source electrode of the HEMT, and adjusting a level of the gate voltage applied to the gate electrode of the HEMT according to the measured voltage. The level of the gate electrode may be adjusted if the voltage between the drain electrode and the source electrode is different than a set value.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: October 4, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-kyu Hwang, Woo-chul Jeon, Joon-yong Kim, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Jong-bong Ha
  • Patent number: 9379102
    Abstract: A nitride-based semiconductor diode includes a substrate, a first semiconductor layer disposed on the substrate, and a second semiconductor layer disposed on the first semiconductor layer. The first and second semiconductor layers include a nitride-based semiconductor. A first portion of the second semiconductor layer may have a thickness thinner than a second portion of the second semiconductor layer. The diode may further include an insulating layer disposed on the second semiconductor layer, a first electrode covering the first portion of the second semiconductor layer and forming an ohmic contact with the first semiconductor layer and the second semiconductor layer, and a second electrode separated from the first electrode, the second electrode forming an ohmic contact with the first semiconductor layer and the second semiconductor layer.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: June 28, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh
  • Patent number: 9306544
    Abstract: An electronic device may include a first transistor having a normally-on characteristic; a second transistor connected to the first transistor and having a normally-off characteristic; a constant voltage application unit configured to apply a constant voltage to a gate of the first transistor; and a switching unit configured to apply a switching signal to the second transistor. The first transistor may be a high electron mobility transistor (HEMT). The second transistor may be a field-effect transistor (FET). The constant voltage application unit may include a diode connected to the gate of the first transistor; and a constant current source connected to the diode.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: April 5, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-chul Jeon, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh
  • Patent number: 9252255
    Abstract: Provided are a high electron mobility transistor (HEMT) and a method of manufacturing the HEMT. The HEMT includes: a channel layer comprising a first semiconductor material; a channel supply layer comprising a second semiconductor material and generating two-dimensional electron gas (2DEG) in the channel layer; a source electrode and a drain electrode separated from each other in the channel supply layer; at least one depletion forming unit that is formed on the channel supply layer and forms a depletion region in the 2DEG; at least one gate electrode that is formed on the at least one depletion forming unit; at least one bridge that connects the at least one depletion forming unit and the source electrode; and a contact portion that extends from the at least one bridge under the source electrode.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: February 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-seob Kim, In-jun Hwang, Jai-kwang Shin, Jae-joon Oh, Woo-chul Jeon, Hyuk-soon Choi, Sun-kyu Hwang
  • Patent number: 9245738
    Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer; a channel supply layer on the channel layer; a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer; a gate electrode on a part of the channel supply layer between the source electrode and the drain electrode; a first depletion-forming layer between the gate electrode and the channel supply layer; and a at least one second depletion-forming layer on the channel supply layer between the gate electrode and the drain electrode. The at least one second depletion-forming layer is electrically connected to the source electrode.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: January 26, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Jong-seob Kim, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Hyuk-soon Choi, In-jun Hwang
  • Patent number: 9231093
    Abstract: A high electron mobility transistor (HEMT) according to example embodiments includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a Schottky electrode forming a Schottky contact with the channel supply layer. An upper surface of the channel supply layer may define a Schottky electrode accommodation unit. At least part of the Schottky electrode may be in the Schottky electrode accommodation unit. The Schottky electrode is electrically connected to the source electrode.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 5, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Kyoung-yeon Kim, Jong-seob Kim, Joon-yong Kim, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Hyuk-soon Choi, Jong-bong Ha, Sun-kyu Hwang, In-jun Hwang
  • Patent number: 9231057
    Abstract: A power switching device includes a channel forming layer on a substrate which includes a 2-dimensional electron gas (2DEG), and a channel supply layer which corresponds to the 2DEG at the channel forming layer. A cathode is coupled to a first end of the channel supply layer and an anode is coupled to a second end of the channel supply layer. The channel forming layer further includes a plurality of depletion areas arranged in a pattern, and portions of the channel forming layer between the plurality of depletion areas are non-depletion areas.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: January 5, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-chul Jeon, Young-hwan Park, Ki-yeol Park, Jai-kwang Shin, Jae-joon Oh
  • Patent number: 9214517
    Abstract: A semiconductor device includes a first compound semiconductor layer on a substrate, first through third electrodes spaced apart from each other on the first compound semiconductor layer, a second compound semiconductor layer on the first compound semiconductor layer between the first through third electrodes, a third compound semiconductor layer on the second compound semiconductor layer between the first and second electrodes, a first gate electrode on the third compound semiconductor layer, a fourth compound semiconductor layer having a smaller thickness than the third compound semiconductor layer on a portion of the second compound semiconductor layer between the second and third electrodes, and a second gate electrode on the fourth compound semiconductor layer. The first compound semiconductor layer between the second and third electrodes includes a 2-dimensional electron gas (2DEG) and the third compound semiconductor layer includes a 2-dimensional hole gas (2DHG).
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: December 15, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Jai-kwang Shin, Jae-joon Oh
  • Patent number: 9209250
    Abstract: Provided are high electron mobility transistors (HEMTs), methods of manufacturing the HEMTs, and electronic devices including the HEMTs. An HEMT may include an impurity containing layer, a partial region of which is selectively activated. The activated region of the impurity containing layer may be used as a depletion forming element. Non-activated regions may be disposed at opposite side of the activated region in the impurity containing layer. A hydrogen content of the activated region may be lower than the hydrogen content of the non-activated region. In another example embodiment, an HEMT may include a depletion forming element that includes a plurality of regions, and properties (e.g., doping concentrations) of the plurality of regions may be changed in a horizontal direction.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: December 8, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-hwan Park, Jai-kwang Shin, Ki-yeol Park, Jae-joon Oh, Woo-chul Jeon, Hyo-ji Choi
  • Patent number: 9147738
    Abstract: According to example embodiments, a high electron mobility transistor includes: a channel layer including a first semiconductor material; a channel supply layer on the channel layer and configured to generate a 2-dimensional electron gas (2DEG) in the channel layer, the channel supply layer including a second semiconductor material; source and drain electrodes spaced apart from each other on the channel layer, and an upper surface of the channel supply layer defining a gate electrode receiving part; a first gate electrode; and at least one second gate electrode spaced apart from the first gate electrode and in the gate electrode receiving part. The first gate electrode may be in the gate electrode receiving part and between the source electrode and the drain electrode. The at least one second gate electrode may be between the source electrode and the first gate electrode.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: September 29, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Young-hwan Park, Ki-yeol Park, Jai-kwang Shin, Jae-joon Oh, Jong-bong Ha, Sun-kyu Hwang
  • Patent number: 9087704
    Abstract: According to example embodiments, a semiconductor device may include a high electron mobility transistor (HEMT) on a first region of a substrate, and a diode on a second region of the substrate. The HEMT may be electrically connected to the diode. The HEMT and the diode may be formed on an upper surface of the substrate such as to be spaced apart from each other in a horizontal direction. The HEMT may include a semiconductor layer. The diode may be formed on another portion of the substrate on which the semiconductor layer is not formed. The HEMT and the diode may be cascode-connected to each other.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 21, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-chul Jeon, Young-hwan Park, Ki-yeol Park, Jai-kwang Shin, Jae-joo Oh, Jong-bong Ha
  • Patent number: 9082693
    Abstract: A nitride semiconductor based power converting device includes a nitride semiconductor based power transistor, and at least one nitride semiconductor based passive device. The passive device and the power transistor respectively include a channel layer including a first nitride semiconductor material, and a channel supply layer on the channel layer including a second nitride semiconductor material to induce a 2-dimensional electron gas (2DEG) at the channel layer. The passive device may be a resistor, an inductor, or a capacitor.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: July 14, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Baik-woo Lee, Jai-kwang Shin, Jae-joon Oh
  • Patent number: 9053964
    Abstract: Example embodiments relate to semiconductor devices and/or methods of manufacturing the same. According to example embodiments, a semiconductor device may include a first heterojunction field effect transistor (HFET) on a first surface of a substrate, and a second HFET. A second surface of the substrate may be on the second HFET. The second HFET may have different properties (characteristics) than the first HFET. One of the first and second HFETs may be of an n type, while the other thereof may be of a p type. The first and second HFETs may be high-electron-mobility transistors (HEMTs). One of the first and second HFETs may have normally-on properties, while the other thereof may have normally-off properties.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: June 9, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-chul Jeon, Woong-je Sung, Jai-kwang Shin, Jae-joon Oh
  • Publication number: 20150048421
    Abstract: Provided are high electron mobility transistors (HEMTs), methods of manufacturing the HEMTs, and electronic devices including the HEMTs. An HEMT may include an impurity containing layer, a partial region of which is selectively activated. The activated region of the impurity containing layer may be used as a depletion forming element. Non-activated regions may be disposed at opposite side of the activated region in the impurity containing layer. A hydrogen content of the activated region may be lower than the hydrogen content of the non-activated region. In another example embodiment, an HEMT may include a depletion forming element that includes a plurality of regions, and properties (e.g., doping concentrations) of the plurality of regions may be changed in a horizontal direction.
    Type: Application
    Filed: May 20, 2014
    Publication date: February 19, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-hwan PARK, Jai-kwang SHIN, Ki-yeol PARK, Jae-joon OH, Woo-chul JEON, Hyo-ji CHOI
  • Patent number: 8939696
    Abstract: A carrier transfer for automatically transferring a substrate carrier includes a gripper detachably coupled to the substrate carrier, the substrate carrier including a plurality of substrates and at least one open gate through which the plurality of substrates are loaded into or unloaded from the substrate carrier. The gripper includes a gate blocking unit secured to the gripper and configured to shift to a blocking position, the blocking position being a position of the gate blocking unit that partially blocks the gate to prevent the plurality of substrates from being separated from the substrate carrier during the automatic transferring of the substrate carrier.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: January 27, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Nam Lee, In-Cheol Kim, Jong-Hoon Kim, Hee-Sang Yang, Yu-Dong Won, Sung-Yeol Lee, Jong-In Lee, Min-Gu Chang, Woo-Chul Jeon
  • Patent number: 8933446
    Abstract: A HEMT according to example embodiments may include a first semiconductor layer, a second semiconductor layer configured to induce a 2-dimensional electron gas (2DEG) in the second semiconductor layer, an insulating mask layer on the second semiconductor layer, a depletion forming layer on one of a portion of the first semiconductor layer and a portion of the second semiconductor layer that is exposed by an opening defined by the insulating mask layer, a gate on the depletion forming layer, and a source and a drain on at least one of the first semiconductor layer and the second semiconductor layer. The source and drain may be spaced apart from the gate. The depleting forming layer may be configured to form a depletion region in the 2DEG.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: January 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Woo-chul Jeon
  • Patent number: 8907377
    Abstract: A higher electron mobility transistor (HEMT) and a method of manufacturing the same are disclosed. According to example embodiments, the HEMT may include a channel supply layer on a channel layer, a source electrode and a drain electrode that are on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a source pad and a drain pad. The source pad and a drain pad electrically contact the source electrode and the drain electrode, respectively. At least a portion of at least one of the source pad and the drain pad extends into a corresponding one of the source electrode and drain electrode that the at least one of the source pad and the drain pad is in electrical contact therewith.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: December 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-chul Jeon, Ki-yeol Park, Young-hwan Park, Jai-kwang Shin, Jae-joon Oh, Hyuk-soon Choi, Jong-bong Ha
  • Patent number: 8896026
    Abstract: Provided is a nitride semiconductor device including: a nitride semiconductor layer over a substrate wherein the nitride semiconductor has a two-dimensional electron gas (2DEG) channel inside; a drain electrode in ohmic contact with the nitride semiconductor layer; a source electrode in Schottky contact with the nitride semiconductor layer wherein the source electrode is spaced apart from the drain electrode; a dielectric layer formed on the nitride semiconductor layer between the drain electrode and the source electrode and on at least a portion of the source electrode; and a gate electrode disposed on the dielectric layer to be spaced apart from the drain electrode, wherein a portion of the gate electrode is formed over a drain-side edge portion of the source electrode with the dielectric layer interposed therebetween, and a manufacturing method thereof.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: November 25, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Woo Chul Jeon, Ki Yeol Park, Young Hwan Park