Abstract: An area-selective deposition method may include providing a substrate structure including a silicon oxide area and a silicon nitride area; performing a surface treatment on the silicon oxide area and the silicon nitride area of the substrate structure to form a first functional group on a surface of the silicon oxide area and to form a second functional group on a surface of the silicon nitride area; and performing an atomic layer deposition (ALD) process in a chamber in which the substrate structure is disposed, to selectively form a silicon oxide layer on the silicon oxide area among the silicon nitride area and the silicon oxide area. The ALD process may include: supplying an aminosilane-based silicon precursor into the chamber; purging the chamber with a first purge gas; supplying an oxygen-containing source into the chamber; and purging the chamber with a second purge gas.

Abstract: A deposition method may include: providing a structure to be deposited that includes a silicon oxide area and a silicon nitride area having different surface characteristics from each other; and performing an atomic layer deposition (ALD) process in a reactor provided with the structure to selectively form a silicon oxide layer on the silicon oxide portion between the silicon oxide portion and the silicon nitride portion. The ALD process may include: supplying a silicon precursor into the reactor to selectively adsorb the silicon precursor to a surface of the silicon oxide portion; purging the reactor; supplying an inhibitor material into the reactor to selectively adsorb the inhibitor material to a surface of the silicon nitride portion; purging the reactor; supplying an oxygen-containing source into the reactor; and purging the reactor.

Abstract: A deposition method may include: providing a structure to be deposited that includes a silicon oxide area and a silicon nitride area having different surface characteristics from each other; and performing an atomic layer deposition (ALD) process in a reactor provided with the structure to selectively form a silicon oxide layer on the silicon oxide portion between the silicon oxide portion and the silicon nitride portion. The ALD process may include: supplying a silicon precursor into the reactor to selectively adsorb the silicon precursor to a surface of the silicon oxide portion; purging the reactor; supplying an inhibitor material into the reactor to selectively adsorb the inhibitor material to a surface of the silicon nitride portion; purging the reactor; supplying an oxygen-containing source into the reactor; and purging the reactor.

Abstract: An area-selective deposition method may include providing a substrate structure including a silicon oxide area and a silicon nitride area; performing a surface treatment on the silicon oxide area and the silicon nitride area of the substrate structure to form a first functional group on a surface of the silicon oxide area and to form a second functional group on a surface of the silicon nitride area; and performing an atomic layer deposition (ALD) process in a chamber in which the substrate structure is disposed, to selectively form a silicon oxide layer on the silicon oxide area among the silicon nitride area and the silicon oxide area. The ALD process may include: supplying an aminosilane-based silicon precursor into the chamber; purging the chamber with a first purge gas; supplying an oxygen-containing source into the chamber; and purging the chamber with a second purge gas.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate insulating layers are on the first through fourth areas, respectively. Amounts of work function control materials in the first through fourth gate insulating layers, nitrogen concentrations in the first through fourth gate insulating layers, and/or thicknesses of the first through fourth gate insulating layers vary among the first through fourth gate insulating layers. Methods for fabricating semiconductor devices are also provided.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate insulating layers are on the first through fourth areas, respectively. Amounts of work function control materials in the first through fourth gate insulating layers, nitrogen concentrations in the first through fourth gate insulating layers, and/or thicknesses of the first through fourth gate insulating layers vary among the first through fourth gate insulating layers. Methods for fabricating semiconductor devices are also provided.

Abstract: Provided are methods for fabricating a semiconductor device. A gate dielectric layer is formed on a substrate including first through third regions. A first functional layer is formed on only the first region of the first through third regions. A second functional layer is formed on only the first and second regions of the first through third regions. A threshold voltage adjustment layer is formed on the first through third regions. The threshold voltage adjustment layer includes a work function adjustment material. The work function adjustment material is diffused into the gate dielectric layer by performing a heat treatment process with respect to the substrate.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate insulating layers are on the first through fourth areas, respectively. Amounts of work function control materials in the first through fourth gate insulating layers, nitrogen concentrations in the first through fourth gate insulating layers, and/or thicknesses of the first through fourth gate insulating layers vary among the first through fourth gate insulating layers. Methods for fabricating semiconductor devices are also provided.

Abstract: Provided are methods for depositing a cerium doped hafnium containing high-k dielectric film on a substrate. The reagents of specific methods include hafnium tetrachloride, an organometallic complex of cerium and water.

Abstract: Provided are methods for fabricating a semiconductor device. A gate dielectric layer is formed on a substrate including first through third regions. A first functional layer is formed on only the first region of the first through third regions. A second functional layer is formed on only the first and second regions of the first through third regions. A threshold voltage adjustment layer is formed on the first through third regions. The threshold voltage adjustment layer includes a work function adjustment material. The work function adjustment material is diffused into the gate dielectric layer by performing a heat treatment process with respect to the substrate.

Abstract: Provided are methods for depositing a cerium doped hafnium containing high-k dielectric film on a substrate. The reagents of specific methods include hafnium tetrachloride, an organometallic complex of cerium and water.